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T83C5101 Просмотр технического описания (PDF) - Temic Semiconductors

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T83C5101 Datasheet PDF : 52 Pages
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T87C5101
T83C5101/02
XTAL1
XTAL1:2
X2 bit
CPU clock
STD Mode
X2 Mode
STD Mode
Figure 2. Mode Switching Waveforms
The X2 bit in the CKCON register (See Table 3.) allows to switch from 12 clock cycles per instruction to 6 clock
cycles and vice versa. At reset, the standard speed is activated (STD mode). Setting this bit activates the X2 feature
(X2 mode).
CAUTION
In order to prevent any incorrect operation while operating in X2 mode, user must be aware that all peripherals
using clock frequency as time reference (UART, timers, PCA...) will have their time reference divided by two.
For example a free running timer generating an interrupt every 20 ms will then generate an interrupt every 10 ms.
UART with 4800 baud rate will have 9600 baud rate.
For further details on the X2 feature, please refer to ANM072 available on the web (http://www.temic-semi.com)
8
Rev. E - 29 February 2000

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