SX1233 Просмотр технического описания (PDF) - Semtech Corporation

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производитель

SX1233

High Bit Rate Transceiver Low Power Integrated UHF Transceiver

Semtech Corporation 

SX1233

ADVANCED COMMUNICATIONS & SENSING

Table of contents

Section

DATASHEET

Page

1. General Description ................................................................................................................................................. 8

1.1. Simplified Block Diagram ................................................................................................................................. 8

1.2. Pin and Marking Diagram ................................................................................................................................9

1.3. Pin Description ...............................................................................................................................................10

2. Electrical Characteristics ....................................................................................................................................... 11

2.1. ESD Notice .................................................................................................................................................... 11

2.2. Absolute Maximum Ratings ........................................................................................................................... 11

2.3. Operating Range............................................................................................................................................ 11

2.4. Chip Specification ..........................................................................................................................................12

2.4.1. Power Consumption .................................................................................................................................. 12

2.4.2. Frequency Synthesis................................................................................................................................. 12

2.4.3. Receiver .................................................................................................................................................... 13

2.4.4. Transmitter ................................................................................................................................................ 14

2.4.5. Digital Specification ...................................................................................................................................15

3. Chip Description .................................................................................................................................................... 16

3.1. Power Supply Strategy .................................................................................................................................. 16

3.2. Low Battery Detector ..................................................................................................................................... 16

3.3. Frequency Synthesis ..................................................................................................................................... 16

3.3.1. Reference Oscillator.................................................................................................................................. 16

3.3.2. CLKOUT Output .........................................................................................................................................17

3.3.3. PLL Architecture........................................................................................................................................ 17

3.3.4. Lock Time ..................................................................................................................................................18

3.3.5. Lock Detect Indicator................................................................................................................................. 18

3.4. Transmitter Description ..................................................................................................................................19

3.4.1. Architecture Description ............................................................................................................................ 19

3.4.2. Bit Rate Setting ......................................................................................................................................... 19

3.4.3. FSK Modulation......................................................................................................................................... 20

3.4.4. OOK Modulation........................................................................................................................................ 21

3.4.5. Modulation Shaping................................................................................................................................... 21

3.4.6. Power Amplifiers ....................................................................................................................................... 21

3.4.7. Over Current Protection ............................................................................................................................ 22

3.5. Receiver Description ......................................................................................................................................23

3.5.1. Block Diagram ........................................................................................................................................... 23

3.5.2. LNA - Single to Differential Buffer ............................................................................................................. 23

3.5.3. Automatic Gain Control ............................................................................................................................. 24

3.5.4. Quadrature Mixer - ADCs - Decimators .................................................................................................... 25

3.5.5. Channel Filter ............................................................................................................................................ 26

3.5.6. DC Cancellation ........................................................................................................................................ 27

3.5.7. Complex Filter - OOK ................................................................................................................................ 27

Rev 3.April 2010

Page 2

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