ML53612 Просмотр технического описания (PDF) - Oki Electric Industry

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ML53612

64-Channel Full Duplex H.100/H.110 CT Bus System Interface and Time-Slot Interchange

Oki Electric Industry 

s ML53612 s ––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––

Signal Description [1]

Name

FR_COMP_N

SCLK

SCLKX2_N

C2

C4_N

C16_POS_N

C16_NEG_N

L_CLK_1

L_FS_1

L_CLK_0

L_FS_0

L_SO_[1:0]

MC_CLK

MC_RXD

GPIO_[3:0]

TDO

NC

VDDO

VSSO

VDDC

VSSC

Description

Compatibility frame sync used by SCbus, MVIP-90, and H-MVIP. (I/O, TTL Schmitt, 24 mA, 5V tolerant)

SCbus Clock. (I/O, TTL Schmitt, 24 mA, 5V tolerant)

SCbus X2 Clock. (I/O, TTL Schmitt, 24 mA, 5V tolerant)

MVIP-90 2.048 MHz Clock. (I/O, TTL Schmitt, 6 mA, 5V tolerant)

MVIP-90 4.096 MHz Clock. (I/O, TTL Schmitt, 6 mA, 5V tolerant)

H-MVIP 16.384 MHz Positive active low Clock. High to low transition on frame boundary. (I/O, TTL Schmitt, 24 mA, 5V tolerant)

H-MVIP 16.384 MHz Negative active low Clock. Low to high transition on frame boundary. (I/O, TTL Schmitt, 24 mA, 5V tolerant)

Local bus Clock 1. (I/O, TTL Schmitt, 24 mA, 50 k Pull Up, 5 V tolerant)

Local bus Frame Sync 1. (I/O, TTL Schmitt, 24 mA, 50 k Pull Up, 5V tolerant)

Local bus Clock 0. (I/O, TTL Schmitt, 24 mA, 50 k Pull Up, 5 V tolerant)

Local bus Frame Sync 0. (I/O, TTL Schmitt, 50 k Pull Up, 24 mA, 5V tolerant)

Local bus Serial Output Data Streams. (I/O, TTL Schmitt, 50 k Pull Up, 8 mA, 5V tolerant)

Message Channel Clock Output. (I/O, TTL Schmitt, 50 k Pull Up, 6 mA, 5V tolerant)

Message Channel Receive Data Output. (I/O, TTL Schmitt, 50 k Pull Up, 6 mA, 5V tolerant)

General Purpose I/O ports. (I/O, TTL Schmitt, 24 mA, 50 k Pull Up, 5V tolerant)

Test Access Port Data Output. (Output, 6 mA, 5V tolerant)

No Connect

+3.3 Volt I/O Power Supply

I/O Ground

+3.3 Volt Core Power Supply

Core Ground

1. Signals ending in “_N” are active low.

6

Oki Semiconductor

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