ST10F167 Просмотр технического описания (PDF) - STMicroelectronics
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ST10F167 Datasheet PDF : 61 Pages
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ST10F167
III - FUNCTIONAL DESCRIPTION
The architecture of the ST10F167 combines
advantages of both RISC and CISC processors
and an advanced peripheral subsystem.
Figure 3 : Block diagram
The following block diagram gives an overview of
the different on-chip components and the high
bandwidth internal bus structure of the ST10F167.
Internal
32
FLASH
Memory
CPU-Core
16
16
Internal
RAM
16
XRAM
16
CAN
PEC
Interrupt Controller
Watchdog
OSC.
16
16
16
8
Port 6
8
Port 5
16
BRG
BRG
Port 3
15
Port 7
8
16
Port 8
8
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