ST10F167(1997) Просмотр технического описания (PDF) - STMicroelectronics

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ST10F167
(Rev.:1997)

16-BIT MCU WITH 128K BYTE FLASH MEMORY

STMicroelectronics 

ST10F167

Table 2.1

Symbol

WR/WRL

READY

ALE

EA

PORT0:

P0L.0-

P0L.7,

P0H.0-

P0H.7

Pin Definitions and Functions (cont’d)

Pin

Number

96

Input (I)

Output

(O)

O

97

I

98

O

99

I

I/O

100-107

108,

111-117

Function

External Memory Write Strobe. In WR-mode this pin is activated

for every external data write access. In WRL-mode this pin is ac-

tivated for low byte data write accesses on a 16-bit bus, and for

every data write access on an 8-bit bus. See WRCFG in register

SYSCON for mode selection.

Ready Input. When the Ready function is enabled, a high level at

this pin during an external memory access will force the insertion

of memory cycle time waitstates until the pin returns to a low level.

Address Latch Enable Output. Can be used for latching the ad-

dress into external memory or an address latch in the multiplexed

bus modes.

External Access Enable pin. A low level at this pin during and after

Reset forces the ST10F167 to begin instruction execution out of

external memory. A high level forces execution out of the internal

Flash Memory.

PORT0 consists of the two 8-bit bidirectional I/O ports P0L and

P0H. It is bit-wise programmable for input or output via direction

bits. For a pin configured as input, the output driver is put into high-

impedance state.

In case of an external bus configuration, PORT0 serves as the ad-

dress (A) and address/data (AD) bus in multiplexed bus modes

and as the data (D) bus in demultiplexed bus modes.

Demultiplexed bus modes:

Data Path Width:8-bit 16-bit

P0L.0 – P0L.7:D0 – D7D0 - D7

P0H.0 – P0H.7:I/O D8 - D15

Multiplexed bus modes:

Data Path Width:8-bit 16-bit

P0L.0 – P0L.7:AD0 – AD7AD0 - AD7

P0H.0 – P0H.7:A8 - A15AD8 - AD15

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