SSM-2120 Просмотр технического описания (PDF) - Analog Devices

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SSM-2120

Dynamic Range Processors/Dual VCA

Analog Devices 

SSM2120/SSM2122

DYNAMIC FILTER

Figure 12 shows a control circuit for a dynamic filter capable of

single ended (nonencode/decode) noise reduction. Such circuits

usually suffer from a loss of high frequency content at low signal

levels because their control circuits detect the absolute amount

of highs present in the signal. This circuit, however, measures

wideband level as well as high frequency band level to produce

a composite control signal combined in a 1:2 ratio respectively.

The upper detector senses wideband signals with a cutoff of

20 Hz while the lower detector has a 5 kHz cutoff to sense only

high frequency band signals. This approach allows very good

noise masking with a minimum loss of “highs” when the signal

level goes below the threshold.

AUDIO

INPUT

10kΩ 2.2µF RECIN

9

FC ≤ 20Hz

(WIDEBAND)

|IIN|

3.3µF

V+ THRESHOLD

CONTROL

V–

160kΩ THRESH

1kΩ 1

39kΩ CONOUT 12kΩ

3

LOG AV

2

1.5MΩ

V–

10kΩ 3300pF RECIN

15

FC = 5kHz

(HIGH FREQUENCY)

|IIN|

3.3µF

V–

160kΩ

V+

LOG AV

13

1.5MΩ

THRESH

1kΩ 12

V–

39kΩ CONOUT 5.6kΩ

14

200Ω

5 +VC

V–

36kΩ

SIGIN

8

47Ω

2200pF

7 –VC

200Ω

36kΩ

SIGOUT

5

36kΩ

36kΩ

100pF

AUDIO

OUTPUT

Figure 12. Dynamic Noise Filter Circuit

–8–

REV. C

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