DS2436 Просмотр технического описания (PDF) - Dallas Semiconductor -> Maxim Integrated

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DS2436

Battery ID/Monitor Chip

Dallas Semiconductor -> Maxim Integrated 

DETAILED PIN DESCRIPTION

SYMBOL DESCRIPTION

GND

Ground pin

DQ

Data input/output pin for 1-Wire communication port

VDD

Supply Pin- input power supply (battery connection)

NC

No Connect

DS2436

OVERVIEW

The block diagram of Figure 1 shows the major components of the DS2436. The DS2436 has seven

major data components: 1) 64-bit lasered ROM ID, 2) Scratchpad Memory, 3) Nonvolatile Memory, 4)

On-board SRAM, 5) Temperature sensor, 6) Battery voltage A/D converter, and 7)16-bit Manufacturer

ID Register.

Communication to the DS2436 is via a 1-Wire port. With the 1-Wire port, the memory and control

functions will not be available until the ROM function protocol has been established. The master must

first provide one of four ROM function commands: 1) Read ROM, 2) Match ROM, 3) Search ROM, or 4)

Skip ROM. These commands operate on the 64-bit ROM ID portion of each device and can identify a

specific device if many are present on the 1-Wire line as well as indicate to the bus master how many and

what types of devices are present. After a ROM function sequence has been successfully executed, the

memory and control functions are accessible. The master may then provide any one of the fifteen memory

and control function commands.

Access to the DS2436 memory is through the 1-Wire interface and scratchpad memory. Charging

parameters and other data such as battery chemistry, fuel gauge information, and other user data may be

stored in the DS2436, allowing this information to be permanently stored in the battery pack.

PARASITE POWER

The ID ROM registers and memory of the DS2436 can be read even when the battery is completely

discharged by using parasite-powered operation. When parasite powered, the DS2436 “steals” power

from the DQ line whenever it is high. DQ will provide sufficient power for read operations as long as

specified timing and voltage requirements are met (see the section titled “1-Wire Bus System”).

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