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SP708SEU

+3.0V/+3.3V Low Power Microprocessor Supervisory Circuits

Signal Processing Technologies 

PIN DESCRIPTION

NAME

FUNCTION

Manual Reset - This input triggers a reset pulse

when pulled below 0.8V. This active-LOW input

MR has an internal 70µA pull-up current. It can be

driven from a TTL or CMOS logic line or shorted

to ground with a switch

SP706P SP706R/S/T SP708R/S/T

DIP/

SOIC

µSOIC

DIP/

SOIC

µSOIC

DIP/

SOIC

µSOIC

1

3

1

3

1

3

VCC

GND

Voltage input.

Ground reference for all signals

2

4

2

4

2

4

3

5

3

5

3

5

Power-Fail Input - When this voltage monitor input

PFI is less than 1.25V, PFO goes LOW. Connect PFI 4

6

4

6

4

6

to ground or VCC when not in use.

PFO

Power-Fail Output - This output is HIGH until PFI

is less than 1.25V.

5

7

5

7

5

7

Watchdog Input - If this input remains HIGH or

LOW for 1.6s, the internal watchdog timer times

out and WDO goes LOW. Floating WDI or

WDI

connecting WDI to a high-impedance tri-state

buffer disables the watchdog feature. The internal

6

8

6

8

-

-

watchdog timer clears whenever RESET is

asserted, WDI is tri-stated, or whenever WDI sees

a rising or falling edge.

N.C. No Connect.

-

-

-

-

6

8

Active-LOW RESET Output - This output pulses

LOW for 200ms when triggered and stays LOW

whenever VCC is below the reset threshold. It

RESET remains LOW for 200ms after Vcc rises above the

-

-

7

1

7

1

reset threshold or MR goes from LOW to HIGH.

A watchdog timeout will not trigger RESET unless

WDO is connected to MR.

Watchdog Output - This output pulls LOW when

the internal watchdog timer finishes its 1.6s count

and does not go HIGH again until the watchdog is

cleared. WDO also goes LOW during low-line

WDO

conditions. Whenever VCC is below the reset

threshold, WDO stays LOW. However, unlike

8

2

8

2

-

-

RESET, WDO does not have a minimum pulse

width. As soon as VCC is above the reset

threshold, WDO goes HIGH with no delay.

Active-HIGH RESET Output - This output is the

RESET

complement of RESET. Whenever RESET is

HIGH, RESET is LOW, and vice versa. Note the

7

1

-

-

8

2

SP708R/S/T has a reset output only.

Table 1. Device Pin Description

Rev. 10-17-00

SP706 +3.0/ +3.3 Low Power Microprocessor Circuits

5

© Copyright 2000 Sipex Corporation

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