SM6452AM Просмотр технического описания (PDF) - Nippon Precision Circuits

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SM6452AM

Audio Variable Volume ICs

Nippon Precision Circuits  

SM6452AM/BM

MICROCONTROLLER INTERFACE

SM6452AM

Transfer format

The SM6452AM uses a 3-wire serial interface to select channels and set attenuation levels. The transfer format

is shown in figure 1.

MDT

MCK

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

MLEN

Figure 1. Microcontroller input data timing

Data is shifted into the internal shift register on the rising edge of MCK, and the attenuation value is loaded and

changed on the rising edge of MLEN. Accordingly, data on MDT should be changed on the falling edge of

MCK. The dotted lines for MCK and MLEN also indicate valid timing.

Data description (D15 to D0)

In the following description, LOW implies VIL level and HIGH implies VIH level.

s D15, D14

Don’t care.

s D13 to D8

Chip address bits. Each of 6 channels is set when the corresponding bit is set HIGH.

• D13: channel 1

• D12: channel 2

• D11: channel 3

• D10: channel 4

• D9: channel 5

• D8: channel 6

s D7 to D0

Gain/attenuation set bits. The gain/attenuation setting for ATT register settings are shown in table 1.

NIPPON PRECISION CIRCUITS—10

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