UPD784928YGC-XXX-8EU Просмотр технического описания (PDF) - NEC => Renesas Technology
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UPD784928YGC-XXX-8EU Datasheet PDF : 96 Pages
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INTERNAL BLOCK DIAGRAM
µPD784927, 784928, 784927Y, 784928Y
NMI
INTP0-INTP3
INTERRUPT
CONTROL
PWM0-PWM5
PTO00-PTO02
PTO10, PTO11
SUPER TIMER
UNIT
VREFC
REEL0IN
REEL1IN
CSYNCIN
DFGIN
DPGIN
CFGIN
CFGAMPO
CFGCPIN
CTLOUT1
CTLOUT2
CTLIN
RECCTL+
RECCTL-
CTLDLY
DFGMON
DPGMON
CFGMON
CTLMON
AVDD1, AVDD2
AVSS1, AVSS2
AVREF
AN10-AN11
ANALOG UNIT
&
A/D CONVERTER
SI1
SO1
SCK1
SERIAL
INTERFACE 1
SI2/BUSY
SO2
SCK2
STRB
SERIAL
INTERFACE 2
SDA
SCL
SERIAL
INTERFACE 3Note
78K/IV
16-BIT CPU CORE
(RAM: 512 bytes)
RAM
ROM
SYSTEM
CONTROL
VDD
VSS
X1
X2
XT1
XT2
RESET
CLOCK OUTPUT CLO
BUZZER OUTPUT BUZ
KEY INPUT
KEY0-KEY4
REAL-TIME
OUTPUT PORT
P00-P07
P80, P82, P83
PORT0
P00-P07
PORT2
P20-P23
PORT3
P30-P37
PORT4
P40-P47
PORT5
P50-P57
PORT6
P60-P67
PORT7
P70-P77
PORT8
P80, P82-P87
PORT9
P90-P96
PORT10
P100-P103
PORT11
P110-P113
Note Only the µPD784928 subseries supports I2C bus interface.
Remark Internal ROM and RAM capacities differ depending on the product.
8
Data Sheet U12255EJ2V0DS00
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