MC13029DW Просмотр технического описания (PDF) - Motorola => Freescale
Номер в каталоге
Компоненты Описание
производитель
MC13029DW Datasheet PDF : 13 Pages
| |||
MC54/74HC4351 MC54/74HC4353
APPLICATIONS INFORMATION
The Channel Select and Enable control pins should be at
VCC or GND logic levels. VCC being recognized as a logic
high and GND being recognized as a logic low. In this
example:
VCC = + 5 V = logic high
GND = 0 V = logic low
The maximum analog voltage swings are determined by
the supply voltages VCC and VEE. The positive peak analog
voltage should not exceed VCC. Similarly, the negative peak
analog voltage should not go below VEE. In this example, the
difference between VCC and VEE is ten volts. Therefore, us-
ing the configuration in Figure 16, a maximum analog signal
of ten volts peak–to–peak can be controlled. Unused analog
inputs/outputs may be left floating (i.e., not connected). How-
ever, tying unused analog inputs and outputs to VCC or GND
through a low value resistor helps minimize crosstalk and
feedthrough noise that may be picked up by an unused
switch.
Although used here, balanced supplies are not a require-
ment. The only constraints on the power supplies are that:
VCC – GND = 2 to 6 volts
VEE – GND = 0 to – 6 volts
v VCC – VEE = 2 to 12 volts
and VEE GND
When voltage transients above VCC and/or below VEE are
anticipated on the analog channels, external Germanium or
Schottky diodes (Dx) are recommended as shown in
Figure 17. These diodes should be able to absorb the maxi-
mum anticipated current surges during clipping.
+5 V
+5V
20
+5V
ANALOG
ON
ANALOG
–5V
SIGNAL
SIGNAL
–5V
+5 V
7
15
TO EXTERNAL CMOS
8
13
9
12
10
11
CIRCUITRY
0 TO 5 V DIGITAL
SIGNALS
–5 V
Figure 16. Application Example
VCC
VCC
VCC
Dx
20
Dx
ON/OFF
Dx
Dx
VEE
VEE
9
10
VEE
Figure 17. External Germanium or
Schottky Clipping Diodes
+5V
+5V
+5V
VEE
20
+5V
ANALOG
SIGNAL
ON/OFF
ANALOG
SIGNAL
+5V
VEE
+5V
VEE
20
+5V
ANALOG
SIGNAL
ON/OFF
ANALOG
SIGNAL
VEE
*
VCC
RR R R
7
15
8
13
9
12
10
11
LSTTL/NMOS
CIRCUITRY
VCC
7
15
8
13
9
12
10
11
+5V
LSTTL/NMOS
CIRCUITRY
VEE
* 2 k ≤ R ≤ 10 k
a. Using Pull–Up Resistors
VEE
HCT
BUFFER
b. Using HCT Interface
Figure 18. Interfacing LSTTL/NMOS to CMOS Inputs
MOTOROLA
10
High–Speed CMOS Logic Data
DL129 — Rev 6
Share Link: 