HC4046 Просмотр технического описания (PDF) - System Logic Semiconductor

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производитель

HC4046

Phase-Locked Loop High-Performance Silicon-Gate CMOS

System Logic Semiconductor 

SL74HC4046

[VCO Section]

DC ELECTRICAL CHARACTERISTICS(Voltages Referenced to GND) - continued

Symbol

Parameter

Test Conditions

IIN Maximum Input

VIN =Vcc or GND

Leakage Current INH,

VCOIN

VVCOIN

R1

Operating Voltage

Range at VCOIN over

the range specified for

R1; For linearity see

Fig.13A, Parallel value

of R1 and R2 should be

>2.7 kΩ

INH= VIL

Resistor Range

R2

C1 Capacitor Range

VCC

Guaranteed Limit

V 25 °C to

-55°C

≤85°C

≤125°C Unit

6.0

0.1

1.0

1.0

µA

Min Max Min Max Min Max

3.0 0.1 1.0 0.1 1.0 0.1 1.0 V

4.5 0.1 2.5 0.1 2.5 0.1 2.5

6.0 0.1 4.0 0.1 4.0 0.1 4.0

3.0 3.0 300 3.0 300 3.0 300 kΩ

4.5 3.0 300 3.0 300 3.0 300

6.0 3.0 300 3.0 300 3.0 300

3.0 3.0 300 3.0 300 3.0 300

4.5 3.0 300 3.0 300 3.0 300

6.0 3.0 300 3.0 300 3.0 300

3.0 40 No

pF

4.5 40 Li-

6.0 40 mit

[VCO Section]

AC ELECTRICAL CHARACTERISTICS(CL=50pF,Input tr=tf=6.0 ns)

Symbol

Parameter

∆f/T Frequency Stability with Temperature

Changes (Figures 11A,B,C)

fo VCO Center Frequency

(Duty Factor = 50%)

(Figures 12A,B,C)

∆fVCO VCO Frequency Linearity

∂VCO Duty Factor at VCOOUT

VCC

Guaranteed Limit

V 25 °C to

-55°C

≤85°C

≤125°C Unit

Min Max Min Max Min Max

3.0

%/K

4.5

6.0

3.0 3

4.5 11

6.0 13

MHz

3.0

See Figures 13A,B

%

4.5

6.0

3.0

Typical 50%

%

4.5

6.0

SLS

System Logic

Semiconductor

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