SIP12202 Просмотр технического описания (PDF) - Vishay Semiconductors

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производитель

SIP12202

Synchronous Step Down Controller

Vishay Semiconductors 

SiP12202

Vishay Siliconix

New Product

FUNCTIONAL BLOCK DIAGRAM

SiP12202

0.45 V

PG

FB

Vin

Vin

UVLO

Over Temp

Over Voltage

DH

Soft Start

Shut Down

FB

GM

PWM Comp

Comp

Over Current

LX

Sense

Gate Control

Logic

0.6 V

OSC

500KHz

∆Vosc

BBM

Vin

DL

SD/Comp

Agnd

DETAILED OPERATIONAL DESCRIPTION

Enable/ON State:

The COMP/SD pin has 10 µA pull up current to ensure

auto startup as soon as the pin is released by the

external pull down MOS. When the internal reference

is ready, there will be a clamp current applied at

COMPSD; this is to ensure the COMPSD pin will not

go below 600 mV inadvertently due to the amplifier

excursion or noise. The COMPSD has to go above 600

mV to enable the chip fully.

Disable/Shutdown/Off State

To disable the chip, the COMP/SD pin has to pulled

below 150 mV typically and the external pull down

MOSFET has to be able to sink at least 250 µA. Once

the pin reaches a voltage below the 150 mV level, the

chip will go into shutdown mode with only essential

curcuitry alive and the current bias of the chip will be

cut down to 30 µA level typically. Both High Side and

Low Side Gates are off.

UVLO:

The chip enters into Under Voltage Lockout when VIN

is below 2.3 V (typical). Both High Side Gate and Low

Side Gate will be turned off. The chip will go out of

UVLO mode when VIN is above 2.4 V (typical).

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4

Pgnd

Soft Start:

Once the chip is out of shutdown and UVLO mode the

soft start is initiated. The soft start is done accom-

plished by ramping up the internal reference. During

soft start mode the chip can not enter into fault mode.

If there is an over current condition (current limit condi-

tion), the High Side Gate will be turned off and the Low

Side will be turned on. Once the soft start timing

elapses, the chip enters into a normal state of opera-

tion.

Output Over Voltage State:

When the Output voltage goes above 1.083 times

nominal Output Voltage, the High Side Gate will be

turned off and the Low Side Gate will be on. The con-

dition will persist until the Output voltage drops below

the trigger voltage minus a hysteresis.

Output Over Current State:

The SiP12202 will enter a cycle by cycle over current

condition when the voltage on the LX pin falls below

VIN by 300 mV. During the over current condition the

High Side MOSFET is turned off for the duration of the

existing cycle. At the beginning of the next cycle the

High Side MOSFET turns on and the LX voltage is

measured again. If the over current condition still

exists, the High Side MOSFET is turned off again. This

is repeated seven consecutive times after which the IC

will go into a fault state. If the over current condition is

removed before seven consecutive cycles the IC

reverts to normal operating mode.

Document Number: 73542

S-52083–Rev. A, 10-Oct-05

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