SI5317 Просмотр технического описания (PDF) - Silicon Laboratories

Номер в каталоге

Компоненты Описание

производитель

SI5317

PIN-CONTROLLED 1–710 MHZ JITTER CLEANING CLOCK

Silicon Laboratories 

Si5317

Table 4. AC Characteristics (Continued)

(VDD = 1.8 ±5%, 2.5 ±10%, or 3.3 V ±10%, TA = –40 to 85 ºC)

Parameter

Symbol

Test Condition

Min

LVCMOS Output Pins

Rise/Fall Times

tRF

CLOAD = 20 pf

—

See Figure 2

LOSn Trigger Window

Time to Clear LOS Alarm

LOSTRIG From LVST CKIN to LOS

Measured from appearance 90

tLOSCLR of valid CKIN to of LOS

alarm

Time to Clear LOL after LOS Cleared tCLRLOL fin unchanged and XA/XB —

stable.

LOS to  LOL

PLL Performance

Lock Time

tLOCKHW RST with valid CKIN to  —

LOL; BW = 100 Hz

Closed Loop Jitter Peaking

Jitter Tolerance

JPK

JTOL

BW determined by

BWSEL[1:0]

—

5000/

BW

Minimum Reset Pulse Width

Lock Time

Spurious Noise

tRSTMIN

1

tLOCKMP Reset b  to  of LOL

—

SPSPUR

Max spur @ n x f3

(n > 1, n x f3 < 100 MHz)

—

Typ

25

—

—

10

0.05

—

—

35

—

Max Units

—

ns

750 µs

220 ms

—

ms

1.2 sec

0.1

—

—

1000

–75

dB

ns pk-

pk

µs

ms

dBc

Preliminary Rev. 0.15

11

Share Link: