SI5317 Просмотр технического описания (PDF) - Silicon Laboratories

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SI5317

PIN-CONTROLLED 1–710 MHZ JITTER CLEANING CLOCK

Silicon Laboratories 

Si5317

Table 4. AC Characteristics

(VDD = 1.8 ±5%, 2.5 ±10%, or 3.3 V ±10%, TA = –40 to 85 ºC)

Parameter

Input Frequency

CKIN Input Pins

Input Duty Cycle (Minimum Pulse

Width)

Input Capacitance

Input Rise/Fall Time

CKOUT Output Pins

Output Frequency (Output not

configured for CMOS or disable)

Maximum Output Frequency in

CMOS Format

Single-ended Output Rise/Fall

(20–80%)

Differential Output Rise/Fall Time

Output Duty Cycle Differential

Uncertainty

Symbol

Test Condition

Min

CKNF

1

Whichever is smaller

40

CKNDC

2

CKNCIN

—

CKNTRF

20–80%

—

See Figure 2

CKOF

1

CKOFMC

1

CMOS Output

—

CKOTRF

VDD = 1.62

Cload = 5 pF

CMOS Output

—

VDD = 2.97

Cload = 5 pF

CKOTRF 20 to 80 %, fOUT = 622.08 —

CKODC

100  Load

—

Line to Line

Measured at 50% Point

(not for CMOS)

LVCMOS Pins

Input Capacitance

CIN

—

Typ Max Units

—

710 MHz

—

60

%

—

—

ns

—

3

pF

—

11

ns

—

710 MHz

— 212.5 MHz

—

8

ns

—

2

ns

230 350 ps

—

±40 ps

—

3

pF

10

Preliminary Rev. 0.15

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