SI5315 Просмотр технического описания (PDF) - Silicon Laboratories

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SI5315

SYNCHRONOUS ETHERNET/TELECOM JITTER ATTENUATING CLOCK MULTIPLIER

Silicon Laboratories 

1.1. Three-Level (3L) Input Pins (No External Resistors)

Si5315 VDD

Iimm

75 k

External Driver

75 k

Si5315

Figure 3. Three-Level Input Pins

Table 5. Three-Level Input Pins (No External Resistors)

Parameter

Symbol

Min

Max

Input Voltage Low

Input Voltage Mid

Input Voltage High

Input Low Current

Vill

Vimm

Vihh

Iill

—

0.45 x VDD

0.85 x VDD

–6 µA

0.15 x VDD

0.55 x VDD

—

—

Input Mid Current

Iimm

–2 µA

2 µA

Input High Current

Iihh

—

6 µA

Note: The above currents are the amount of leakage that the 3L inputs can tolerate from an external driver.

Rev. 1.0

11

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