SI4010-C2-AT Просмотр технического описания (PDF) - Silicon Laboratories

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SI4010-C2-AT

CRYSTAL-LESS SOC RF TRANSMITTER

Silicon Laboratories 

Si4010-C2

LIST OF FIGURES

Figure 1.1. Si4010 Block Diagram ............................................................................................ 12

Figure 2.1. Test Block Diagram with 10-Pin MSOP ................................................................. 13

Figure 3.1. Si4010 Used in a 5-button RKE System with LED Indicator .................................. 14

Figure 3.2. Si4010 with an External Crystal in a 4-button RKE System with LED Indicator ..... 14

Figure 1. Si4010 Top Marking .................................................................................................. 16

Figure 2. Si4010 Top Marking .................................................................................................. 17

Figure 7.1. 10-Pin MSOP Package ..........................................................................................22

Figure 7.2. 14-Pin SOIC Package ............................................................................................ 23

Figure 8.1. 10-Pin MSOP Recommended PCB Land Pattern .................................................. 24

Figure 9.1. 14-Pin SOIC Recommended PCB Land Pattern .................................................... 26

Figure 11.1. Functional Block Diagram .................................................................................... 33

Figure 12.1. Simplified PA Block Diagram ............................................................................... 36

Figure 13.1. OOK Timing Example ..........................................................................................40

Figure 13.2. FSK Timing Example ........................................................................................... 40

Figure 17.1. Frequency Counter Block Diagram ...................................................................... 50

Figure 22.1. CIP-51 Block Diagram ..........................................................................................55

Figure 23.1. Address Space Map after the Boot ...................................................................... 65

Figure 24.1. NVM Address Map ............................................................................................... 72

Figure 24.2. CODE/XDATA RAM Address Map ....................................................................... 75

Figure 24.3. Boot Routine Destination CPU Address Space for Copy from NVM .................... 79

Figure 30.1. Device Package and Port Assignments ............................................................. 108

Figure 30.2. GPIO[3:1] Functional Diagram ........................................................................... 110

Figure 30.3. Other GPIO Functional Diagram ........................................................................ 110

Figure 30.4. Push Button Organization in Matrix Mode .......................................................... 113

Figure 30.5. GPIO[5] LED Driver Block Diagram ...................................................................117

Figure 31.1. Output Clock Generator Block Diagram ............................................................. 123

Figure 33.1. RTC Timer Block Diagram .................................................................................128

Figure 34.1. Timer Interrupt Generation .................................................................................132

Figure 34.2. Timer 16-bit Mode Block Diagram (Wide Mode) ................................................ 133

Figure 34.3. Capture 16-bit Mode Block Diagram (Wide Mode) ............................................ 134

Figure 34.4. Two 8-bit Timers in Timer/Timer Configuration (Split Mode) ............................. 135

Figure 34.5. Two 8-bit Timers in Capture/Capture Configuration (Split Mode) ...................... 136

Figure 34.6. Two 8-Bit TImers in Timer/Capture Configuration (Split Mode) ......................... 137

Figure 34.7. Two 8-Bit Timers In Capture/Timer Configuration (Split Mode) ......................... 138

Figure 35.1. 10-pin C2 USB Debugging Adapter Connection to Device ................................ 148

Figure 35.2. 14-Pin C2 ToolStick Connection to Device ........................................................ 150

6

Rev. 1.0

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