6742HL Просмотр технического описания (PDF) - Fairchild Semiconductor
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6742HL Datasheet PDF : 13 Pages
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Marking Information
ZXYTT
6742HR
TPM
Pin Configuration
ZXYTT
6742HL
TPM
F - Fairchild Logo
Z - Plant Code
X - 1-Digit Year Code
Y - 1-Digit Week Code
TT - 2-Digit Die Run Code
T - Package Type (S=SOP)
P - Y: Green Package
M - Manufacture Flow Code
Figure 3. Top Mark
GND
FB
NC
HV
SOP-8
1
8
2
7
3
6
4
5
GATE
VDD
SENSE
RT
Figure 4. Pin Configuration (Top View)
Pin Definitions
Pin #
1
2
3
4
5
6
7
8
Name
GND
FB
NC
HV
RT
SENSE
VDD
GATE
Description
Ground.
The signal from the external compensation circuit is fed into this pin. The PWM duty cycle is
determined in response to the signal on this pin and the current-sense signal on the SENSE pin.
No connection.
For startup, this pin is pulled high to the line input or bulk capacitor via resistors.
For over-temperature protection, an external NTC thermistor is connected from this pin to the
GND pin. The impedance of the NTC decreases at high temperatures. Once the voltage of the
RT pin drops below a fixed limit, PWM output is latched.
Current sense. The sensed voltage is used for peak-current-mode control and cycle-by-cycle
current limiting.
Power supply. The internal protection circuit disables PWM output as long as VDD exceeds the
OVP trigger point.
The totem-pole output driver. Soft driving waveform is implemented for improved EMI.
© 2008 Fairchild Semiconductor Corporation
SG6742HL/HR • Rev. 1.0.4
3
www.fairchildsemi.com
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