SC480 Просмотр технического описания (PDF) - Semtech Corporation

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SC480

Complete DDR1/2/3 Memory Power Supply

Semtech Corporation 

SC480

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Application Information

+5V Bias Supplies

The SC480 requires an external +5V bias supply in addition

to the battery. If stand-alone capability is required, the

+5V supply can be generated with an external linear

regulator. To minimize crosstalk, the controller has seven

supply pins: VDDP (2 pins), PGND1 (2 pins), PGND2,

VCCA and AGND.

The controller requires its own AGND plane which should

be tied by a single trace to the negative terminal of the

output capacitor. All external components referenced

to AGND in the schematic should then be connected to

the AGND plane. The supply decoupling capacitor should

be tied between VCCA and AGND. A single 10Ω resistor

should be used to decouple the VCCA supply from the

main VDDP supply. PGND can then be a separate plane

which is not used for routing analog traces. All PGND

connections should connect directly to this plane with

special attention given to avoiding indirect connections

between AGND and PGND which will create ground loops.

As mentioned above, the AGND plane must be connected

to the PGND plane at the negative terminal of the output

capacitor. The VDDP input provides power to the upper

and lower gate drivers. A decoupling capacitor for the

VDDP supply and PGND is recommended. No series

resistor between VDDP and the 5 volt bias is required.

Pseudo-Fixed Frequency Constant On-Time

PWM Controller

The PWM control method is a constant-on-time, pseudo-

fixed frequency PWM controller, see Figure 1. The ripple

voltage seen across the output capacitor’s ESR provides

the PWM ramp signal, eliminating the need for a current

sense resistor. The on-time is determined by a one-shot

whose period is proportional to output voltage, and

inversely proportional to input voltage. A separate one-

shot sets the minimum off-time (typically 425ns).

On-Time One-Shot (TON)

The on-time one-shot comparator has two inputs. One

input looks at the output voltage, while the other input

samples the input voltage and converts it to a proportional

current. This current charges an internal on-time capacitor.

The TON time is the time required for this capacitor to

charge from zero volts to VOUT, thereby making the on-

time of the high-side switch directly proportional to output

voltage and inversely proportional to input voltage. This

implementation results in a nearly constant switching

frequency without the need of a clock generator.

TON

3.3x10

 12

x

(RTON



37x103

)

x

¨¨©§

VOUT

VIN

¸¸¹·



50ns

RTON is a resistor connected between the input supply and

the TON pin.

VDDQ/VTT Enable & Power-Save

The EN/PSV pin controls the VDDQ supply and the REF

output (1/2 of VDDQ). VTTEN enables the VTT supply. The

VTT and VDDQ supplies may be enabled independently.

When EN/PSV is tied to VCCA the VDDQ controller is

enabled in power-save mode. When the EN/PSV pin is

floated, an internal resistor divider activates the VDDQ

controller with power-save disabled. If PSAVE is enabled,

the SC480 PSAVE comparator looks for inductor current

to cross zero on eight consecutive cycles. Once observed,

the controller enters power-save and turns off the low-

side MOSFET when the current crosses zero. To improve

the efficiency and add hysteresis, the on-time is increased

by 20% in power-save. The efficiency improvement at light

loads more than offsets the disadvantage of slightly higher

output ripple. If the inductor current does not cross zero

on any switching cycle, the controller immediately exits

power-save. Since the controller counts zero crossings,

the converter can sink current as long as the current does

not cross zero on eight consecutive cycles. This allows the

output voltage to recover quickly in response to negative

load steps even when power-save is enabled.

VDDQ Voltage Selection

VDDQ voltage is set using the FB pin. Grounding FB sets

VDDQ to fixed 2.5V. Connecting FB to +5V sets VDDQ to

fixed 1.8V. VDDQ can also be adjusted from 1.5 to 3.0V

using external resistors, see Figure 2. The voltage at FB is

then compared to the internal 1.5V reference.

To VDDQ output capacitor

R2

C

To SC480 FB (pin 9)

R3

Figure 2

© 2006 Semtech Corp.

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