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SC4524D

18V 2A Step-Down Switching Regulator

Semtech Corporation 

SC4524D

Applications Information (Cont.)

becomes armed. As the load draws more current from

the regulator, the current-limit comparator ILIM (Figure

2) will eventually limit the switch current on a cycle-by-

cycle basis. The over-current signal OC goes high, setting

the latch B3. The soft-start capacitor is discharged with

(ID - IC) (Figure 3). If the inductor current falls below the

current limit and the PWM comparator instead turns off

the switch, then latch B3 will be reset and IC will recharge

the soft-start capacitor. If over-current condition persists

or OC becomes asserted more often than PWM over

a period of time, then the soft-start capacitor will be

discharged below 1.9V. At this juncture, comparator B4

sets the overload latch B2. The soft-start capacitor will be

continuously discharged with (ID - IC). The COMP pin is

immediately pulled to ground. The switching regulator is

shut off until the soft-start capacitor is discharged below

1.0V. At this moment, the overload latch is reset. The

soft-start capacitor is recharged and the converter again

undergoes soft-start. The regulator will go through soft-

start, overload shutdown and restart until it is no longer

overloaded.

If the FB voltage falls below 0.8V because of output

Fig.4 overload, then the switching frequency will be reduced.

Frequency foldback helps to limit the inductor current

when the output is hard shorted to ground.

During normal operation, the soft-start capacitor is

charged to 2.4V.

Setting the Output Voltage

The regulator output voltage is set with an external

resistive divider (Figure 1) with its center tap tied to the

FB pin. For a given R6 value, R4 can be found by

R 4 = R6  1V.0OV − 1 

(1)

SettingDt=heVISN w+ViVtOcD+h−iVnVDgCEFS ArTequency

The switching frequency of the SC4524D is set with an

external resistor from the ROSC pin to ground. Table 3

lists

staDnIdL a=rd(

VreOs+istVoDr)v⋅a(1lu−esDf)or

FSW ⋅ L1

typical

frequency

setting.

L1

=

(VO + VD ) ⋅ (1 − D)

20%⋅IO ⋅FSW

Table 3: Resistor for Typical Switching Frequency

Freq. (k)

200

250

300

350

400

500

600

ROSC (k)

110

84.5

69.8

57.6

49.9

38.3

30.9

Freq. (k)

700

800

900

1000

1100

1200

1300

ROSC (k)

25.5

21.5

18.2

15.8

14.0

12.4

11.0

Freq. (k)

1400

1500

1600

1700

1800

1900

2000

ROSC (k)

9.76

8.87

8.06

7.15

6.34

5.62

5.23

Minimum On Time Consideration

TdhoewnoRp4sewr=aitRticn6hgin1dgV.0OuVtrye−gc1uylcalteorofina

non-synchronous step-

continuous-conduction

mode (CCM) is given by

D = VIN +VVOD+−V VDCESAT

(2)

where VCESAT is the switch saturation voltage and VD is

voltage drop across the rectifying diode.

In

DIL

peak

= (VO + VD ) ⋅ (1

currentF-mSWo⋅dLe1

− D)

control,

the

PWM

modulating

ramp is the sensed current ramp of the power switch.

Tohni.sTchuLer1rine=nte(trVsr2Oae0m+c%tVpioD⋅nIi)Os⋅

(a1b−seDn) t unless the switch is turned

o⋅FfStWhis ramp with the output of the

voltage feedback error amplifier determines the switch

pulse width. The propagation delay time required to

immedIRiaMtSe_lCyINtu=rInOo⋅ ff Dth⋅e(1sw−iDtc)h after it is turned on is the

SmS2in70imREuVm6-7controllable switch on time (TON(MIN)).

AC =

AC =

R7 =

C5 =

C8 =

Vo =

Vc

Minumum On Time vs Temperature

DVO

=20D0 IL

⋅ ESR

+

8

1

⋅ FSW

⋅CO



180

VO=1.5V, IO=1A, 1MHz

AC

=

−

20

⋅

l1o6g0 

1

GCAR

S

⋅1

2πFCC O

⋅

VFB

VO



GPWM

R7 =

AC

=

CIN

− 20

⋅>l1o44g0 ⋅D2V8IION⋅

⋅ F1SW

6.1 ⋅

10

−3

⋅

1

2π⋅80 ⋅103

⋅ 22 ⋅10 −6

⋅

1.0

3.3

C =5

=

15

120

C8 =

R7

=

0

.

1 0 11250.090

28 ⋅10

-−530

=-2252 .30k 25 50 75

Temperature (OC)

100 125

C5

=

2

π

1

F⋅ 1ig6u⋅r1e043. V⋅ a2r2ia.1ti⋅o1n0o3f

M= 0in.4im5nuFm

On

Time

with Ambient Temperature

C8

=

1

2 π⋅ 600 ⋅ 10 3

⋅ 22.1 ⋅10 3

= 12pF

10

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