SC2453ITSTR(2002) Просмотр технического описания (PDF) - Semtech Corporation
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SC2453ITSTR Datasheet PDF : 14 Pages
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SC2453
POWER MANAGEMENT
Applications Information (Cont.)
PWM CONTROLLER
SC2453 is a voltage mode buck controller that utilizes
an externally compensated high bandwidth error ampli-
fier to regulate output voltage. The power stage of the
synchronous rectified buck converter control-to-output
transfer function is as shown below:
GVD (s)
=
VIN
1+ sRCC
1+
s
L
R
+
s2LC
where,
PRELIMINARY
The transfer function of the compensation network is as
follows:
(1+ s )(1+ s )
GCOMP (s)
=
ωI
s
⋅
(1 +
ωZ1
s )(1+
ωZ2
s)
ωP1
ωP2
where,
ωZ1
=
R
1
2C1
,
ωZ2
=
(R1
1
+ R3 )C2
ωI
=
1
R1(C1 +
C3
)
,
ωP1
=
1
R3C2
, ωP2
=
R2
1
C1C3
C1 + C3
The design guidelines are as following:
1
ωO = LC
L – Output inductance
C – Output capacitance
RC – Output capacitor ESR
VIN – Input voltage
C3
C2 R3
R2
C1
R1
-
+
Vref
Figure 1. Voltage Mode Buck Converter Compensation
Network
1. Set the loop gain crossover frequency ωC for given
switching frequency.
2. Place an integrator in the origin to increase DC and
low frequency gains.
3. Select ωZ1 and ωZ2 such that they are placed near ωO
to dampen peaking; the loop gain has –20dB rate
to go across the 0dB line for obtaining a wide band-
width.
4. Cancel ωESR with compensation pole ωP1 (ωP1 = ωESR ).
5. Place a high frequency compensation pole ωP2 at the
half switching frequency to get the maximum attenu-
ation of the switching ripple and the high frequency
noise with the adequate phase lag at ωC.
T
ω Z1
ωo
Loop gain T(s)
ωZ2
Gd
ωc
0dB
ω p1
ω p2
ω ESR
Figure 2. Asymptotic diagram of buck power stage and
its compensated loop gain.
2002 Semtech Corp.
9
www.semtech.com
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