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C504-2RM Просмотр технического описания (PDF) - Infineon Technologies

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C504-2RM
Infineon
Infineon Technologies Infineon
C504-2RM Datasheet PDF : 71 Pages
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C504
Table 1
Pin Definitions and Functions (cont’d)
Symbol
Pin Number I/O1) Function
(P-MQFP-44)
P3.0 - P3.7 5, 7 - 13
I/O Port 3
is an 8-bit bidirectional port. P3.0 (R×D) and P3.1
(T×D) operate as defined for the C501. P3.2 to P3.7
contain the external interrupt inputs, timer inputs,
and four of the analog inputs of the A/D converter.
Port 3 pins are assigned to be used as analog inputs
via the bits of SFR P3ANA. P3.6/WR can be
assigned as a third interrupt input.
The functions are assigned to the pins of port 3 as
follows:
5
P3.0 / RxD
Receiver data input (asynch.) or
data input/output (synch.) of
serial interface
7
P3.1 / TxD
Transmitter data output
(asynch.) or clock output
(synch.) of serial interface
8
P3.2 / AN4 / INT0 Analog input channel 4 /
external interrupt 0 input /
Timer 0 gate control input
9
P3.3 / AN5 / INT1 Analog input channel 5 /
external interrupt 1 input /
Timer 1 gate control input
10
P3.4 / AN6 / T0 Analog input channel 6 / Timer 0
counter input
11
P3.5 / AN7 / T1 Analog input channel 7 / Timer 1
counter input
12
P3.6 / WR / INT2 WR control output; latches the
data byte from port 0 into the
external data memory /
external interrupt 2 input
13
P3.7 / RD
RD control output; enables the
external data memory
Data Sheet
6
2000-05

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