Philips Semiconductors
PANorama-IC (PAN-IC)
MICROCONTROLLER BUS TIMING (SNERT BUS)
SYMBOL
PARAMETER
Tcy(SNCL)
tsu(i)
th(i)
th(o)(D)
td
SNCL cycle time
input data set-up time
input data hold time
output data hold time
output data delay time
CONDITIONS
see Fig.7
see Fig.7
see Fig.7
see Fig.7
see Fig.7
Preliminary specification
SAA4995WP
MIN.
1
90
50
0
−
MAX. UNIT
−
µs
−
ns
−
ns
−
ns
700 ns
handbook, full pagewidth
SNCL
SNDA
(receiver
mode)
SNDA
(transmitter
mode)
Tcy(SNCL)
tsu(i)
th(i)
LSB
td
data
valid
data
valid
data
valid
data
valid
th(o)(D)
data
valid
MGK181
Fig.7 SNERT bus interface timing.
MICROCONTROLLER BUS CONTROL (SNERT BUS)
The following control table applies (Table 5), for control via the microcontroller bus (SNERT bus, consisting of SNCL,
SNDA and VRST signals). Data communication is by writing to the PAN-IC (address 40H to 48H) and reading from it
(address 49H)
Table 5 SNERT-bus control
ADDRESS
(HEX)
FUNCTION
# OF BITS
BIT
POSITION
REMARKS
40
X1l
8
7 : 0 definition of X1l with a resolution of 4 samples; see Fig.3 and
note 1
41
X0l
8
7 : 0 definition of X0l with a resolution of 4 samples; see Fig.3 and
note 1
42
X0r
8
7 : 0 definition of X0r with a resolution of 4 samples; see Fig.3 and
note 1
43
X1r
8
7 : 0 definition of X1r with a resolution of 4 samples; see Fig.3 and
note 1
44
output samples
8
per line
7 : 0 resolution of 4 luminance samples; actual #
samples = (programmed # samples + 1) × 4; note 2
1997 Jun 10
11