SAA2521 Просмотр технического описания (PDF) - Philips Electronics

Номер в каталоге

Компоненты Описание

производитель

SAA2521

Masking threshold processor for MPEG layer 1 audio compression applications

Philips Electronics 

Philips Semiconductors

Masking threshold processor for MPEG

layer 1 audio compression applications

Preliminary specification

SAA2521

SYMBOL

PIN

DESCRIPTION

n.c.

41 not connected

n.c.

42 not connected

n.c.

43 not connected

VSS

44 supply ground (0 V)

Note to the Pinning Description

1. The scale input must be set LOW for use with the SAA2521.

TYPE

FUNCTIONAL DESCRIPTION

Coding System

This efficient MPEG audio encoder is used in conjunction

with the SAA2520 filter codec (bit rates of 384, 256, 192

and 128 k bits/s). The encoder utilizes a system producing

sub-band samples from an incoming digital audio signal.

This relies upon the audibility of signals above a given

level and upon high amplitude signals masking those of

lower amplitude. Although each sub-band signal is of

approximately 750 Hz bandwidth, it possesses

considerable overlap with those adjacent to it.

During the process of encoding, the masking threshold

processor analyses the broadband audio signal at

sampling frequency fs by splitting it into 32 sub-band

signals at a sampling frequency (fs/32).

The coded signal consists of frames conveying the

information corresponding to the sub-band samples.

These also include a synchronization pattern identifying

the start of each new frame. The allocation information for

the 32 sub-bands is transferred as 4-bit values. If the

amplitude of a sub-band signal is below the masking

threshold it will be omitted from the coded signal.

The duration of a MPEG frame depends upon sampling

frequency and is adjusted to 384 divided by fs.

Adaptive Allocation and Scaling

The coding system calculates the masking power of the

sub-band signals and adds the masking threshold.

Sub-band signals with power below this threshold denote

information to be discarded. Non-masked signals are

coded using floating point notation in which a mantissa

corresponds in length to the difference between peak

power and masking threshold. The process is repeated for

every MPEG frame and is known as the Adaptive

Allocation of the available capacity.

Encoding Mode

Signal FDIR sets the data flow direction on the

Filtered-I2S-interface. In the encoding mode (FDIR LOW)

the device will accept samples from FDAF. These will be

delayed by a number of sample periods depending upon

the setting of the SCALE input. In the instance of operation

with the SAA2520 (SCALE = logic 0) this delay will be 480

SWS periods. This will ensure alignment of the data with

the computed allocations.

After the delay the samples will be presented on FDAC

(pin 33). The circuit also performs all the calculations

required to build the allocation table which is used in the

codec (SAA2520). When used with the SAA2520 the

calculated scale factor indices are sent via the LT

interface. These operations are performed for every frame

of the sub-band codec.

In order to synchronize with the codec and utilize the

correct tables for the calculations the SAA2521 frequently

requests the status of the codec. It monitors the bit-rate,

sample frequency, operation mode and the emphasis

information and uses the 'ready to receive' bit of the codec

to determine the moment of the transfer of allocation

information.

Decoding Mode

In the decoding mode (FDIR HIGH) the SAA2521 will take

samples from FDAC which will be presented on the FDAF

after a delay of 160 SWS periods. The LT interface

between microcontroller and codec (SAA2520) will only be

affected by the 'ready to receive' bit from the codec

(SAA2520).

August 1993

6

Share Link: