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SAA2013H

Adaptive allocation and scaling for PASC coding in DCC systems

Philips Electronics 

Philips Semiconductors

Adaptive allocation and scaling for PASC

coding in DCC systems

Preliminary specification

SAA2013

channel

handbook, full pagewidth

FDWS

32 bits

left

FDCL

23 22 21 20

1 bit

10

FDWS

FSYNC

sub-band

L

R

31

FDCL

FDAO

FDAI

FDWS

L

R

L

R

0

Tc

t cH

t d4

t d3

1

t cL

t su1

7 bit

t h1

right

L

R

31

FSYNC

timing

L

R

0

MGB360

Fig.7 Filtered interface format.

Control interfaces

Two 3-wire control interfaces are provided (referred to as

‘L3’ interfaces). One is connected to the system

microcontroller (L3MODEM, L3CLKM, L3DATAM where

‘M’ represents microcontroller), the other to SAA2003

(L3MODEC, L3CLKC, L3DATAC where ‘C’ represents

codec). In general, control data is passed between

SAA2003 and the microcontroller via SAA2013. This

ensures that the microcontroller is buffered from the

time-critical SAA2013 to SAA2003 interface during

encode.

The SAA2013 does not interpret the data from the

microcontroller interface.

Status information from the codec is interpreted to ensure

that SAA2013 quickly acts upon the status of SAA2003.

The L3 bus operation is shown in Fig.8. There are three

modes:

1. Address.

2. Data.

3. Halt.

Each interface operates as either a master or a slave,

where the master provides L3CLK and L3MODE. For the

microcontroller to SAA2013 interface, the microcontroller

is the master. For the SAA2013 to SAA2003 interface,

SAA2013 is the master.

May 1994

10

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