S3C72Q5 Просмотр технического описания (PDF) - Samsung

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Компоненты Описание

производитель

S3C72Q5

4–BIT CMOS MICROCONTROLLER

Samsung 

Table

Number

7-1

7-2

7-3

7-4

7-5

7-6

7-7

7-8

8-1

8-2

8-3

9-1

10-1

10-2

10-3

10-4

11-1

11-2

11-3

11-4

11-5

11-6

11-7

11-8

11-9

11-10

11-11

12-1

12-2

12-3

12-4

12-5

13-1

List of Tables (Continued)

Title

Page

Number

Interrupt Types and Corresponding Port Pin(s)........................................................7-1

IS1 and IS0 Bit Manipulation for Multi-Level Interrupt Handling..................................7-6

Standard Interrupt Priorities ..................................................................................7-7

Interrupt Priority Register Settings.........................................................................7-7

IMOD0 and IMOD1 Register Organization ..............................................................7-8

IMOD2 Register Bit Settings.................................................................................7-10

Interrupt Enable and Interrupt Request Flag Addresses ...........................................7-12

Interrupt Request Flag Conditions and Priorities .....................................................7-13

Hardware Operation During Power-Down Modes .....................................................8-2

System Operating Mode Comparison ....................................................................8-3

Unused Pin Connections for Reducing Power Consumption.....................................8-7

Hardware Register Values After RESET.................................................................9-2

I/O Port Overview.................................................................................................10-2

Port Pin Status During Instruction Execution..........................................................10-2

Port Mode Group Flags ........................................................................................10-3

Pull-Up Resistor Mode Register (PUMOD0) Organization ........................................10-4

Basic Timer Register Overview..............................................................................11-3

Basic Timer Mode Register (BMOD) Organization ..................................................11-5

Watchdog Timer Interval Time...............................................................................11-8

TC0 Register Overview .........................................................................................11-11

TMOD0 Settings for TCL0 Edge Detection .............................................................11-14

TC0 Mode Register (TMOD0) Organization.............................................................11-17

TMOD0.6, TMOD0.5, and TMOD0.4 Bit Settings ....................................................11-18

TC1 Register Overview .........................................................................................11-23

TC1 Mode Register (TMOD1) Organization.............................................................11-26

TMOD1.6, TMOD1.5, and TMOD1.4 Bit Settings ....................................................11-27

Watch Timer Mode Register (WMOD) Organization ................................................11-32

LCD Contrast Control Register (LCNST) Organization .............................................12-4

LCD Output Control Register (LCON0) Organization................................................12-5

LCD Output Control Register (LCON1) Organization................................................12-5

LCD Mode Control Register (LMOD) Organization...................................................12-7

KSR Organization................................................................................................12-17

External Memory Control Register (EMCON) Organization ......................................13-2

xvi

S3C72Q5/P72Q5 MICROCONTROLLER

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