DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

S3C72K8 Просмотр технического описания (PDF) - Samsung

Номер в каталоге
Компоненты Описание
производитель
S3C72K8 Datasheet PDF : 30 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
PRODUCT OVERVIEW
S3C72K8/P72K8
Table 1-1. S3C72K8 Pin Descriptions (Continued)
Pin Name
CIN0
CIN1
LCDSY
LCDCK
CLO
TCL0
TCLO0
SEG32–
SEG39
SEG0–
SEG31
COM0–
COM7
VLC1–VLC5
XIN, XOUT
XTIN,
XTOUT
VDD
VSS
RESET
TEST
Pin
Type
I
I/O
I/O
I/O
I/O
I/O
O
O
O
I
I
Description
2-channel comparator input.
CIN0: comparator input or external reference input
CIN1: comparator input only.
LCD synchronization clock output for display
expansion
LCD clock output for display expansion
Clock output
External clock input for timer/counter 0
Timer/counter 0 clock output
LCD segment signal output
LCD segment signal output
LCD common signal output
LCD power supply. Voltage dividing resistors are
assignable by mask option.
Crystal, ceramic or RC oscillator pins for system
clock.
Crystal oscillator pins for subsystem clock.
Main power supply
Ground
Chip reset signal input
Chip test signal input (must be connected to VSS)
Circuit
Type
F–4
Pin
Number
20
21
Share Pin
P1.0/INT0
P1.1/INT1
E–2
30
P3.2
E–2
E–2
E–2
E–2
H–11
H–6
31
32
33
34
75–
80,1,2
43–74
P3.3
P4.0
P4.1
P4.2
P5.0–P5.7
H–6
35–42
3–7
15, 14
17, 18
12
13
B
19
16
NOTE: Pull-up resistors for all I/O ports are automatically disabled if they are configured to output mode
1-6

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]