PRODUCT OVERVIEW
S3C72C8/P72C8
Table 1-1. S3C72C8 Pin Descriptions (Continued)
Pin Name
INT2
INT4
INTP30
INTP31
TEST
VDD
VSS
Pin
Type
Description
I Quasi-interrupt with detection of rising or
falling edges.
I External interrupt with detection of rising or
falling edges.
I Key scan interrupts inputs.
I System test pin
– Power supply pin
– Ground pin
Circuit
Type
E-1
Number
41 (5)
E-1
42 (6)
E-3
18-17
(24-23)
–
9 (15)
–
5 (11)
–
6 (12)
NOTES:
1. Parentheses indicate pin number for 42-SDIP package.
2. Pull-up resistors for all I/O ports are automatically disabled if they are configured to output mode.
Share Pin
P1.2/CLO
P1.3/BUZ
P3.0, P3.1
–
–
–
1-8