S3C72C8 Просмотр технического описания (PDF) - Samsung

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S3C72C8

The S3C72C8 single-chip CMOS microcontroller has been designed for high performance using Samsung's newest 4-bit CPU core, SAM47

Samsung 

S3C72C8/P72C8

PRODUCT OVERVIEW

Table 1-1. S3C72C8 Pin Descriptions (Continued)

Pin Name

SEG0-SEG3

Pin

Type

Description

I/O LCD segment display signal output pins

SEG4-SEG7

SEG8-SEG11

SEG12-SEG15 O LCD segment display output pins

COM0-COM3 O LCD common signal output pins

COM4-COM7 I/O LCD common signal output pins

SCK

SO

SI

BTCO

TCLO1

TCL1

CLO

BUZ

RESET

Xin, Xout

XTin, XTout

CIN0–CIN3

I/O Serial interface clock signal

I/O Serial data output

I/O Serial data input

I/O Basic timer overflow signal

I/O Timer/counter external clock output

I/O Timer/counter external clock input

I/O Clock output

I/O Frequency output to buzzer

I System RESET pin

– Clock input and output pins for main system

clock

– Clock input and output pins for subsystem

clock

I Analog input port for Comparator

K0–K3

INT0

INT1

I/O External interrupts. The triggering edge is

selectable.

I External interrupts. The triggering edge for

INT0 and INT1 is selectable.

Circuit

Type

H–13

H–6

H–4

H–6

E–1

Number

19-22

(25-28)

23-26

(29-32)

27-30

(33-36)

31-34

(37-40)

38-35

(2-1,

42-41)

34-31

(40-37)

16 (22)

Share Pin

P5.0-P5.3

P6.0-P6.3

P7.0-P7.3

COM7-COM4

–

SEG12–

SEG15

P0.0

E–1 15 (21)

E–1 14 (20)

E–1 13 (19)

P0.1

P0.2

P0.3

E–1 39 (3) P1.0/INT0

E–1 40 (4) P1.1/INT1

E–1 41 (5) P1.2/INT2

E–1 42 (6) P1.3/INT4

B

12 (18)

–

–

8-7

–

(14-13)

–

10-11

–

(16-17)

F–8

1-4

P2.0/K0

(7-10)

-P2.3/K3

F–8

1-4

P2.0/CIN0

(7-10) -P2.3/CIN3

E–1 39 (3) P1.0/TCLO1

40 (4) -P1.1/TCL1

1-7

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