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S3C72C8 Просмотр технического описания (PDF) - Samsung

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S3C72C8 Datasheet PDF : 37 Pages
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PRODUCT OVERVIEW
FEATURES
Memory
• 512 × 4-bit RAM (including LCD display RAM)
• 8,192 × 8-bit ROM
28 I/O Pins
• I/O: 26 pins (44-pin QFP, 42-pin SDIP)
• Output only: 2 pins (44-pin QFP)
LCD Controller/Driver
• 12 segments and 8 common terminals
(3, 4, and 8 common selectable)
• Internal resistor circuit for LCD bias
• All dot can be switched on/off
8-bit Basic Timer
• 4 interval timer functions
• Watch-dog timer
16-bit Timer/Counter 1
• Programmable 16-bit timer/counter
• Arbitrary clock output
• External event counter
• External clock signal divider
• Configurable as two 8-bit timer/counters
• Serial I/O interface clock generator
Watch Timer
• Time interval generation: 0.5 s, 3.9 ms
at 32768 Hz
• Four frequency outputs to BUZ pin
• Clock source generation for LCD
8-bit Serial I/O Interface
• 8-bit transmit/receive mode
• 8-bit receive mode
• LSB-first or MSB-first transmission selectable
• Internal or external clock source
Comparator
• 4 channel mode: internal reference (4-bit
resolution)
• 3 channel mode: external reference
1-2
S3C72C8/P72C8
Interrupts
• Four internal vectored interrupts
• Five external vectored interrupts
• Two quasi-interrupts
Bit Sequential Carrier
• Supports 16-bit serial data transfer in arbitrary
format
Memory-Mapped I/O Structure
• Data memory bank 15
Power-Down Modes
• Idle mode (only CPU clock stops)
• Stop mode (main system oscillation stops)
• Sub system clock stop mode
Oscillation Sources
• Crystal, ceramic, or RC for main system clock
• Crystal oscillator for subsystem clock
• Main system clock frequency: 0.4 MHz-6 MHz
• Subsystem clock frequency: 32.768 kHz
• CPU clock divider circuit (by 4, 8, or 64)
Instruction Execution Times
• 0.67, 1.33, 10.7 µs at 6 MHz (main)
• 0.95, 1.91, 15.3 µs at 4.19 MHz (main)
• 122 µs at 32.768 kHz (subsystem)
Operating Temperature
• – 40 °C to 85 °C
Operating Voltage Range
• 1.8 V to 5.5 V
Package Type
• 44-pin QFP, 42-pin SDIP

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