S3C72B9 Просмотр технического описания (PDF) - Samsung

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S3C72B9

The S3C72B5/C72B7/C72B9 single-chip CMOS microcontroller has been designed for high performance using Samsung's newest 4-bit CPU core, SAM47

Samsung 

PRODUCT OVERVIEW

BLOCK DIAGRAM

S3C72B5/C72B7/C72B9/P72B9

SCK/K0/P0.0

SO/K1/P0.1

SI/K2/P0.2

BUZ/K3/P0.3

INT0/P1.0

INT1/P1.1

INT2/P1.2

INT4/P1.3

M/P2.0

LCDFR/P2.1

CLO1/P2.2

CLO2/P2.3

TCLO0/CL/P3.0

TCLO1/P3.1

TCL0/P3.2

TCL1/P3.3

CIN0/P4.0

CIN1/P4.1

CIN2/P4.2

SEG79/K4/P6.0

SEG78/K5/P6.1

SEG77/K6/P6.2

SEG76/K7/P6.3

SEG75-SEG72/

P7.0-P7.3

SEG71-SEG68/

P8.0–P8.3

SEG67-SEG64/

P9.0–P9.3

I/O PORT 0

INPUT PORT 1

I/O PORT 2

I/O PORT 3

I/O PORT 4

I/O PORT 6

I/O PORT 7

I/O PORT 8

I/O PORT 9

SEG63-SEG60/

P10.0–P10.3

SEG59-SEG56/

P11.0–P11.3

I/O PORT 10

I/O PORT 11

SEG55-SEG52/

P12.0–P12.3

SEG51-SEG48/

P13.0–P13.3

I/O PORT 12

I/O PORT 13

RESET

Xin Xout

XTin XTout

INTERRUPT

CONTROL

BLOCK

CLOCK

INTERNAL

INTERRUPTS

INSTRUCTION DECODER

ARITHMETIC

AND

LOGIC UNIT

STACK

POINTER

PROGRAM

COUNTER

PROGRAM

STATUS

WORD

FLAGS

BASIC

TIMER

WATCH-DOG

TIMER

WATCH

TIMER

LCD

DRIVER/

CONTROLLER

SEGMENT

EXPANDER

VLC1-VLC5

COM0-COM7

COM8-COM15/

SEG87-SEG80

SEG0-SEG47

SEG48-SEG79/

PORT13-PORT6

M/P2.0

LCDFR/P2.1

CL/P3.0/TCLO0

SERIAL I/O

8-BIT

TIMER/

COUNTER0

P0.0 /SCK/K0

P0.1 / SO/K1

P0.2 / SI/K2

16-BIT

TIMER/

COUNTER1

8-BIT TIMER/

COUNTER1A

8-BIT TIMER/

COUNTER1B

COMPARATOR

3,584x 4-BIT

DATA

MEMORY

16/24/32 KBYTE

PROGRAM

MEMORY

Figure 1-1. S3C72B5/C72B7/C72B9 Simplified Block Diagram

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