S3C2410A Просмотр технического описания (PDF) - Samsung

Номер в каталоге

Компоненты Описание

производитель

S3C2410A

200MHz & 266MHz 32-Bit RISC Microprocessor

Samsung 

Table of Contents (Continued)

Chapter 4 Thumb Instruction Set (Continued)

Format 16: Conditional Branch..............................................................................................................4-34

Operation....................................................................................................................................4-34

Instruction Cycle Times................................................................................................................4-35

Examples ...................................................................................................................................4-35

Format 17: Software Interrupt................................................................................................................4-36

Operation....................................................................................................................................4-36

Instruction Cycle Times................................................................................................................4-36

Examples ...................................................................................................................................4-36

Format 18: Unconditional Branch..........................................................................................................4-37

Operation....................................................................................................................................4-37

Examples ...................................................................................................................................4-37

Format 19: Long Branch With Link ........................................................................................................4-38

Operation....................................................................................................................................4-38

Instruction Cycle Times................................................................................................................4-39

Examples ...................................................................................................................................4-39

Instruction Set Examples .....................................................................................................................4-40

Multiplication by a Constant Using Shifts and Adds ........................................................................4-40

General Purpose Signed Divide.....................................................................................................4-41

Division by a Constant .................................................................................................................4-43

Chapter 5 Memory Controller

Overview .............................................................................................................................................5-1

Function Description............................................................................................................................5-3

Bank0 Bus Width........................................................................................................................5-3

Memory (SROM/SDRAM) Address Pin Connections.......................................................................5-3

Sdram Bank Address Pin Connection............................................................................................5-4

Nwait Pin Operation.....................................................................................................................5-5

Programmable Access Cycle .......................................................................................................5-11

Bus Width & Wait Control Register (BWSCON) .............................................................................5-13

Bank Control Register (BANKCONN: NGCS0-NGCS5)....................................................................5-15

Bank Control Register (BANKCONN: NGCS6-NGCS7)....................................................................5-16

Refresh Control Register ..............................................................................................................5-17

Banksize Register .......................................................................................................................5-18

SDRAM Mode Register Set Register (MRSR) ................................................................................5-19

viii

S3C2410A MICROPROCESSOR

Share Link: