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RT9002A

Dual Low Dropout Regulator with Detector

Richtek Technology 

RT9002A/B/C

Applications Information

Like any low-dropout regulator, the external capacitors used

with the RT9002A/B/C must be carefully selected for

regulator stability and performance. Using a capacitor

whose value is > 1μF on the RT9002A/B/C input and the

amount of capacitance can be increased without limit. The

input capacitor must be located a distance of not more

than 0.5 inch from the input pin of the IC and returned to a

clean analog ground. Any good quality ceramic can be

used for this capacitor. The capacitor with larger value and

lower ESR (equivalent series resistance) provides better

PSRR and line-transient response.

The output capacitor must meet both requirements for

minimum amount of capacitance and ESR in all LDOs

application. The RT9002A/B/C is designed specifically to

work with low ESR ceramic output capacitor in space-

saving and performance consideration. Using a ceramic

capacitor whose value is at least 1μF with ESR is > 20mΩ

on the RT9002A/B/C output ensures stability. The

RT9002A/B/C still works well with output capacitor of other

types due to the wide stable ESR range. Figure 1. shows

the curves of allowable ESR range as a function of load

current for various output capacitor values. Output capacitor

of larger capacitance can reduce noise and improve load

transient response, stability, and PSRR. The output

capacitor should be located not more than 0.5 inch from

the VOUT pin of the RT9002A/B/C and returned to a clean

analog ground.

Region of Stable COUT ESR vs. Load Current

100

RT9002APS

VIN = 4.0V, VOUT2 = 3.3V

10

CIN = COUT = 1uF/X7R

Unstable Region

1

Stable Region

0.1

0.01

0.001

0

Unstable Region (Simulation Verify)

50

100 150 200 250 300

Load Current (mA)

Figure 1

Enable

The RT9002A/B/C goes into sleep mode when the Enable

pin is in a logic low condition. During this condition, the

pass transistor, error amplifier, and bandgap are turned off,

reducing the supply current to 0.1μA typical. The Enable

pin may be directly tied to VIN to keep the part on. The

Enable input is CMOS logic and cannot be left floating.

PSRR

The power supply rejection ratio (PSRR) is defined as the

gain from the input to output divided by the gain from the

supply to the output. The PSRR is found to be

PSRR

=

20

×

log

⎜⎛

⎝

Δ

Gain Error

Δ Supply

⎟⎞

⎠

Note that when heavy load measuring, Δsupply will cause

Δtemperature. And Δtemperature will cause Δoutput

voltage. So the heavy load PSRR measuring is include

temperature effect.

Current Limit

The RT9002A/B/C contains an independent current limiter,

which monitors and controls the pass transistor's gate

voltage, limiting the output1/2 current to 0.45/0.8A (typ.).

The output can be shorted to ground indefinitely without

damaging the part.

Thermal-Shutdown Protection

Thermal-shutdown protection limits total power dissipation

in the RT9002A/B/C. When the junction temperature

exceeds TJ = +170°C, the thermal sensor signals the

shutdown logic, turning off the pass transistor and allowing

the IC to cool. The thermal sensor turns the pass transistor

on again after the IC's junction temperature cools by 40°C,

resulting in a pulsed output during continuous thermal

overload conditions. Thermal-shutdown protection is

designed to protect the RT9002A/B/C in the event of fault

conditions. For continual operation, do not exceed the

absolute maximum junction temperature rating of TJ =

+125°C.

www.richtek.com

10

DS9002ABC-04 April 2011

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