RMPA2451 Просмотр технического описания (PDF) - Fairchild Semiconductor
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RMPA2451 Datasheet PDF : 7 Pages
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Pin #5
Vd1
Pins #4, #6, #7, #9, #12
Ground
MMIC CHIP
Pin #8
RF INPUT
Pins #1, #2, #3
RF OUTPUT & Vd2
GROUND
Pin #10
(Back of the Chip)
Vg1
Pin #11
Vg2
Figure 2. Functional Block Diagram
Test Procedure for the Evaluation Board (RMPA2451-TB)
It is important that the following points be noted prior to
testing; Pin designations are as shown in Figure 2 and 4.
• Vgg1 and Vgg2 are the negative Gate bias voltages
applied at the pins of the evaluation test board.
• Vdd1 and Vdd2 are the positive Drain bias voltages
applied at the pins of the evaluation test board.
• Vg1 and Vg2 are the negative Gate bias voltages applied
at the pins of the package.
• Vd1 and Vd2 are the positive Drain bias voltages applied
at the pins of the package.
CAUTION: LOSS OF GATE VOLTAGES (VG1, VG2)
WHILE DRAIN VOLTAGES (VD1, VD2) ARE PRESENT
MAY DAMAGE THE AMPLIFIER.
The following sequence of procedures must be followed to
properly test the amplifier:
Step 1: Turn the RF power OFF.
Step 2: Use the GND terminals of the evaluation board for
the ground of the DC supplies.
Step 4: Apply a nominal voltage of +5.0V to the Vdd
terminals. Adjust Vgg2 to provide a second stage quiescent
Drain current, Idd2, of 340 mA. Adjust Vgg1 to give a first
stage quiescent Drain current, Id1 of 60mA.
Step 5: Apply an RF signal within the ISM frequency range
(2.4 - 2.5 GHz) at an initial input power level of -10 dBm.
Step 6: To perform intermodulation product measure-
ments, a second RF signal generator with a frequency
difference of 1 MHz is required, along with an appropriate
power combiner. The test configuration should allow this
additional generator to provide the same input power level
as the first generator into the device. Intermodulation
readings may then be made at the required total output
power levels.
Step 7: To operate at lower quiescent Drain currents,
increase the magnitudes of Vgg1 and Vgg2 as required,
alternatively to operate at higher quiescent Drain currents,
the magnitudes of Vgg1 and Vgg2 should be decreased
accordingly.
Step 8: When turning the amplifier OFF, the power-up
sequence should be reversed.
Step 3: Apply a nominal voltage of approximately - 3.0V to
both Vgg1 and Vgg2 terminals.
©2004 Fairchild Semiconductor Corporation
RMPA2451 Rev. B
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