RF5198 Просмотр технического описания (PDF) - RF Micro Devices
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RF5198 Datasheet PDF : 8 Pages
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RF5198
Evaluation Board Schematic
VCC1
VCC2
C30
4.7 μF
C6
R11
DNI
0Ω
L21
8.2 nH
C10
22 μF
P2-4
P2-3
P2-1
P1-5
VCC BIAS
J1
RF IN
C3
1 nF
50 Ω μstrip
P2
5 GND
VMODE
4 VCC BIAS
3 VCC1
2 GND
1 VCC2
CON5
VREG
C40
4.7 μF
C20
4.7 μF
C2
1 nF
P1
5 VDET
4 GND
3 GND
SUT = Select Under Test
R28
C5
0Ω
DNI
16
15
14
13
1
12
Interstage MN
Q1
IMN
2
11
Q2
3
4
5
Bias
10
OMN
Integrated
Power
Detector
9
6
7
8
C1
1 nF
50 Ω μstrip
J2
RF OUT
R35
5.1 kΩ
R5
0Ω
R46
SUT Ω
C47
4.7 nF
VDET
NOTES
1. L2 is removed when VCC1 is not connected to VCC2, and R1 is placed.
5. R3 = 5.1 kΩ typ. This load resistor determines the detector sensitivity.
An internal 15 pF capacitor is in parallel with this load resistor.
6. R4 is optional and may be used in conjunction with R5 to scale V_DET
(max) if desired.
7. C4 is used in conjunction with R3 and R5 to set the rise and fall time of
the detected output voltage, and trade-off acceptable voltage ripple
versus rise/fall time.
8. R2 is removed when VCC BIAS is not connected to VCC1,2.
P1-2 2 VREG
P1-1 1 VMODE
CON5
6 of 8
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
Rev A5 DS060310
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