TLE7469GV53 Просмотр технического описания (PDF) - Infineon Technologies

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TLE7469GV53

Dual Low Drop Voltage Regulator

Infineon Technologies 

TLE 7469

Circuit Description

Power On Reset

In order to avoid any system failure, a sequence of several conditions has to be passed.

When the level of VQ2 reaches the reset threshold VRT, the signal at RO remains LOW

for the Power-up reset delay time TRD. Then a second comparator checks whether

VQ1 ≥ VRT1 and only if this test is passed the reset output is switched to HIGH. The Reset

output is only released (set to High level) if both output voltages have passed their

specific reset threshold VRT1/2. The reset function and timing is illustrated in Figure 5.

The reset reaction time TRR avoids wrong triggering caused by short “glitches” on the

VQ2-line. For power-fail, in case of VQ2 or VQ1 power down (VQ2 < VRT2 or VQ1 < VRT1 for

t > TRR) a logic LOW signal is generated at the pin RO to reset an external

microcontroller.

Final Data Sheet

15

Rev. 1.3, 2004-10-28

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