TLE7469GV53 Просмотр технического описания (PDF) - Infineon Technologies

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TLE7469GV53

Dual Low Drop Voltage Regulator

Infineon Technologies 

TLE 7469

The drop across the ESR calculates as:

DVESR = DI*ESR (5.2)

To prevent a reset the following relationship must be fullfilled:

DVC + DVESR < 300mV (5.3)

Example: let us assume we have a load current change of 100mA and a blocking

capacitor of 22µF.

DVC = 0.1A * 25µs/22µF = 114mV

So for the ESR we can allow

DVESR = 300mV - 114mV = 186mV

The permissible ESR becomes:

ESR = 186mV/100mA = 1.86Ohm

As a dual regulator the TLE 7469 for correct operation should be always supplied at both

input pins I1 and I2 out of one voltage supply. The dual voltage regulator with both inputs

accessible, offers the possibility to reduce the power dissipation in the package. This can

be achived by two different input voltages or a Drop Resistor* RVi (see Figure 3) at the

input pin I2 for the 2.6V output. If one of this options is chosen,care should be taken, to

apply the device as descibet under “Table 3: Operating Range”.

The reset output RO features an integrated pull-up resistor. Thus it can be directly

coupled to the microcontroller reset input.

The sense comparator output SO is an open collector. An appropriate external pull-up

resistor is typ. 5.6 kΩ … 47 kΩ, the minimum value of 5.6 kΩ being defined by the max.

sink current capability of the SO output transistor. If the sense comparator is not used of

course the pull-up resistor can be spared. In this case the SI pin should be directly

connected to Q1 in order to keep the comparator inactive.

Final Data Sheet

13

Rev. 1.3, 2004-10-28

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