PX6420 Просмотр технического описания (PDF) - Zarlink Semiconductor Inc
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PX6420 Datasheet PDF : 3 Pages
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PX6420
Figure 1: 10 Gb/s differential data output using a PRBS23 optical data input pattern
Product Brief
Figure 2: Diagram shows a typical bonding configuration
for the PX6420 mounted on a TO-46 header.
The figure shows a photodiode attached directly
on the PX6420 IC. Also shown are two
microwave chip capacitors used for VCC
decoupling. Capacitor values of 200 fF are
typical but vary by application environment.
Figure 3: Similar configuration as Figure 2. Sq_En
connected to VCC disables the limiting amplifier
when LOS is asserted.
Chip-Cap
3.3 V
3.3 V
GND
GND
Rate
SReSleScIt
1200
DP DP
DN DN
Chip-Cap
Required
Chip-Cap
3.3 V
3.3 V
GND
GND
Rate
SReSleScIt
1200
DP DP
DN DN
Optional
Chip-Cap
2
Zarlink Semiconductor Inc.
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