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PM3386-BI Просмотр технического описания (PDF) - PMC-Sierra

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PM3386-BI Datasheet PDF : 315 Pages
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RELEASED
DATASHEET
PMC-1991129
ISSUE 7
2.3 Gigabit Ethernet MAC
PM3386
DUAL GIGABIT ETHERNET CONTROLLER
Verifies frame integrity (i.e. FCS and length checks).
Erred frames can be filtered or passed to higher layer device.
Automatic Base page Auto-Negotiation, extended Auto-Negotiation (Next Page)
supported via host.
Egress Ethernet physical frame encapsulation (pad to min size, add preamble, IFG
and CRC generation).
Supports Ethernet 2.0, IEEE 802.3 LLC and IEEE 802.3 SNAP/LLC encoding
formats and VLAN tagged frames.
Provides 8 unicast exact-match address filters to filter frames based on DA or SA
with optional VID.
Each address filter can be programmed to indicate whether to accept or discard
based on a match.
Provides a 64 group multicast address filter.
Supports 64 byte minimum size frames and jumbo frames up to 9.6K bytes.
Programmable Inter-packet gap (IPG).
System side loopback through GMAC for diagnostic capability.
2.4 Flow Control
Supports IEEE 802.3-1998 flow control at each Ethernet port if enabled.
Programmable watermarks for full/empty FIFO thresholds.
Automatic generation of PAUSE frames based on FIFO fill levels.
Upper layer device can flow control Ethernet ports using side-band or host signaling
to cause generation of a PAUSE frame.
Provides side-band Paused state indication to upstream devices.
Loss-less flow control on all valid frames up to 9.6k bytes.
2.5 Statistics
40 bit counters are used to ensure rollover compliance with IEEE 802.3–1998.
Minimum 58 minutes before rollover.
Provides port statistic counters needed to support the standard 802.3-1998, SNMP,
and RMON Management Information Base (MIB) implementations.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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