HI1166(1998) Просмотр технического описания (PDF) - Intersil
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HI1166 Datasheet PDF : 12 Pages
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Test Circuits and Waveforms (Continued)
HI1166
IIN
A
-1V
60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44
61
43
62
42
63
41
64
40
-2V
65
39
66
38
67
37
68
36
1
HI1166
35
2
34
3
33
4
32
5
31
6
30
7
29
8
28
9
27
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
A IEEA
A IEED
-5.2V
-5.2V
FIGURE 19. POWER SUPPLY AND ANALOG INPUT BIAS CURRENT TEST CIRCUIT
0V
VIN
-1V
-2V
60MHz
OSC1
φ: VARIABLE
fR
AMP
VIN
CLK
OSC2
60MHz
ECL
BUFFER
HI1166
8
LOGIC
ANALYZER
1024
SAMPLES
CLK
∆υ
∆t
VIN
129
t
128
127
126
125
σ (LSB)
CLK
APERTURE JITTER
APERTURE JITTER IS DEFINED AS FOLLOWS:
tAJ = σ ⁄ ∆-∆----υt- = σ ⁄ 2----25---6-- × 2πf
Where σ (unit: LSB) is the deviation of the output codes when the
input frequency is exactly the same as the clock and is sampled at
the largest slew rate point.
FIGURE 20A.
FIGURE 20B. APERTURE JITTER TEST METHOD
FIGURE 20. SAMPLING DELAY AND APERTURE JITTER TEST CIRCUIT
11
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