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PCF8564AU/5BB/1 Просмотр технического описания (PDF) - NXP Semiconductors.

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Компоненты Описание
производитель
PCF8564AU/5BB/1
NXP
NXP Semiconductors. NXP
PCF8564AU/5BB/1 Datasheet PDF : 48 Pages
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NXP Semiconductors
7. Pinning information
7.1 Pinning
PCF8564A
Real time clock and calendar
26&, 
26&2 
,17 
966 
\
[

3&)$
 &/.2(
 9''
 &/.287
 6&/
 6'$
DDD
Viewed from active side. For mechanical details, see Figure 27 and Figure 28.
Fig 2. Pinning diagram of PCF8564A
7.2 Pin description
Table 4. Pin description
Input or input/output pins must always be at a defined level (VSS or VDD) unless otherwise specified.
Symbol
Pin
Description
OSCI
1
oscillator input
OSCO
2
oscillator output
INT
3
interrupt output, open-drain, active LOW
VSS
SDA
4
ground[1]
5
serial data input and output
SCL
6
serial clock input
CLKOUT
7
clock output, push-pull
VDD
8
supply voltage
CLKOE
9
CLKOUT enable input
[1] The substrate (rear side of the die) is at VSS potential and must not be connected.
PCF8564A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 26 August 2013
© NXP B.V. 2013. All rights reserved.
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