PCF8833 Просмотр технического описания (PDF) - Philips Electronics
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производитель
PCF8833 Datasheet PDF : 112 Pages
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Philips Semiconductors
STN RGB - 132 × 132 × 3 driver
4 BLOCK DIAGRAM
Objective specification
PCF8833
handbook, full pagewidth
C0 to C395
R0 to R131
VLCDIN2
V2H
V1H
VC
V1L
V2L
VLCDSENSE
VLCDOUT1
VLCDIN1
VLCDOUT2
VDD2
C1+
C1−
C2 +
C2 −
C3 +
C3 −
C4 +
C4 −
C5 +
C5 −
VSS2
VOTP(gate)
VOTP(drain)
VDD3
VDD1
VSS1
713, 719
731, 732
729, 730
724 to 728
722, 723
720, 721
LCD BIAS
LEVEL
GENERATOR
34 to 429
COLUMN DRIVERS
712
674 to 683
684 to 690
703 to 711
530 to 539
626 to 631
632 to 637
638 to 643
644 to 649
650 to 655
656 to 661
662 to 667
668 to 673
691 to 696
697 to 702
508 to 517
565 to 572
557 to 564
525 to 529
519 to 524
498 to 507
LCD
VOLTAGE
GENERATOR
DATA PROCESSING
DATA LATCHES
DISPLAY DATA RAM
132 × 132 × 12-bits
X AND Y RAM WRITE DISPLAY ADDRESS
ADDRESS COUNTER READ COUNTER
ARBITER
PCF8833
256
COLOUR
LUT
256/64 KBYTES
TO 4 KBYTES
COLOUR
MAPPING
MPU INTERFACES
2 to 33, 430 to 461,
464 to 495, 733 to 768
ROW
DRIVERS
ORTHOGONAL
FUNCTION
GENERATOR
RESET
OSCILLATOR
TIMING
GENERATOR
GREYSCALE
CONTROLLER
COMMAND
DECODER
496
RES
555
OSC
578
T1
577
T2
576
T3
575
T4
574
T5
573
T6
625
T7
556
579, 624
518 549 551 550 552 553 554 548 547 545 543 541 546 544 542 540 497
VDD(tieoff) VSS(tieoff)
CS/SCE RD
PS0
PS2 D0/SDIN D2
D4
D6
TE
D/C/SCLK WR
PS1 SDOUT D1
D3
D5
D7
MGU910
2003 Feb 14
Fig.1 Block diagram.
4
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