PCF8562TT-2(2008) Просмотр технического описания (PDF) - NXP Semiconductors.
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PCF8562TT-2 Datasheet PDF : 36 Pages
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NXP Semiconductors
PCF8562
Universal LCD driver for low multiplex rates
• All backplane outputs are set to VLCD
• All segment outputs are set to VLCD
• The selected drive mode is: 1:4 multiplex with 1⁄3 bias
• Blinking is switched off
• Input and output bank selectors are reset
• The I2C-bus interface is initialized
• The data pointer and the subaddress counter are cleared (set to logic 0)
• Display is disabled
Data transfers on the I2C-bus must be avoided for 1 ms following power-on to allow the
reset action to complete.
7.2 LCD bias generator
Fractional LCD biasing voltages are obtained from an internal voltage divider consisting of
three impedances connected in series between VLCD and VSS. The middle resistor can be
bypassed to provide a 1⁄2 bias voltage level for the 1:2 multiplex configuration. The LCD
voltage can be temperature compensated externally using the supply to pin VLCD.
7.3 LCD voltage selector
The LCD voltage selector coordinates the multiplexing of the LCD in accordance with the
selected LCD drive configuration. The operation of the voltage selector is controlled by the
mode-set command (see Section 7.17) from the command decoder. The biasing
configurations that apply to the preferred modes of operation, together with the biasing
characteristics as functions of VLCD and the resulting discrimination ratios (D), are given in
Table 5.
PCF8562_3
Product data sheet
Table 5. Discrimination ratios
LCD drive
mode
Number of:
LCD bias
Backplanes Levels configuration
static
1
1:2 multiplex 2
1:2 multiplex 2
1:3 multiplex 3
1:4 multiplex 4
2
static
3
1⁄2
4
1⁄3
4
1⁄3
4
1⁄3
V------oV--f--f-L-(--RC----MD----S----) V------oV--n---L(--R-C--M-D----S---) D = V-V-----oo--f-n-f--((-R-R---M-M---S-S---)-)
0
1
∞
0.354
0.791
2.236
0.333
0.745
2.236
0.333
0.638
1.915
0.333
0.577
1.732
A practical value for VLCD is determined by equating Voff(RMS) with a defined LCD
threshold voltage (Vth), typically when the LCD exhibits approximately 10 % contrast. In
the static drive mode a suitable choice is VLCD > 3Vth.
Multiplex drive modes of 1:3 and 1:4 with 1⁄2 bias are possible but the discrimination and
hence the contrast ratios are smaller.
Bias is calculated by 1-----+1-----a-- , where the values for a are
a = 1 for 1⁄2 bias
a = 2 for 1⁄3 bias
The RMS on-state voltage (Von(RMS)) for the LCD is calculated with the equation
Rev. 3 — 2 December 2008
© NXP B.V. 2008. All rights reserved.
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