PCA9560 Просмотр технического описания (PDF) - Philips Electronics

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PCA9560

Dual 5-bit multiplexed 1-bit latched I2C EEPROM DIP switch

Philips Electronics 

Philips Semiconductors

Dual 5-bit multiplexed 1-bit latched

I2C EEPROM DIP switch

Product data

PCA9560

DC CHARACTERISTICS

SYMBOL

PARAMETER

Supply

VDD

Supply voltage

IDDL

Supply current

IDDH

Supply current

VPOR

Power-on reset voltage

Input SCL: Input/Output SDA

VIL

LOW-level input voltage

VIH

HIGH-level input voltage

IOL

LOW-level output current

IOL

LOW-level output current

IIH

Leakage current HIGH

IIL

Leakage current LOW

CI

Input capacitance

WP, MUX_SELECT_0, MUX_SELECT_1

IIH

Leakage current HIGH

IIL

Leakage current LOW

CI

Input capacitance

MUX_IN A → E

IIH

Leakage current HIGH

IIL

Leakage current LOW

CI

Input capacitance

A0, A1 Inputs

IIH

Leakage current HIGH

IIL

Leakage current LOW

CI

Input capacitance

MUX_OUT

VOL

LOW-level output voltage

VOL

LOW-level output voltage

IOH

HIGH-level output current

NON-MUXED_OUT

VOL

LOW-level output voltage

VOL

LOW-level output voltage

TEST CONDITION

Operating mode ALL inputs = 0 V

Operating mode ALL inputs = VDD

No load; VI = VDD or GND

VOL = 0.4 V

VOL = 0.6 V

VI = VDD

VI = GND

VI = VDD

VI = GND

VI = VDD

VI = GND

VI = VDD

VI = GND

IOL = 100 µA

IOL = 4 mA

VOH = VDD

IOL = 100 µA

IOL = 2 mA

MIN.

LIMITS

TYP.

MAX.

UNIT

3

—

3.6

V

—

—

1

mA

—

—

600

µA

—

2.3

2.7

V

-0.5

—

0.8

V

2

—

VDD + 0.5

V

3

—

—

mA

6

—

—

mA

-1

—

1

µA

-1

—

1

µA

—

3

6

pF

-1

—

1

µA

-20

—

-50

µA

—

2.5

5

pF

-1

—

1

µA

-20

—

-50

µA

—

2.5

5

pF

-1

—

1

µA

-20

—

-50

µA

—

2

4

pF

—

—

0.4

V

—

—

0.7

V

—

—

100

µA

—

—

0.4

V

—

—

0.7

V

NON-VOLATILE STORAGE SPECIFICATIONS

PARAMETER

Memory cell data retention

Number of memory cell write cycles

SPECIFICATION

10 years min

100,000 cycles min

Application Note AN250 I2C DIP Switch provides additional information on memory cell data retention and the minimum number of write cycles.

2003 Jun 27

11

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