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PCA9513A

Hot swappable I2C-bus and SMBus bus buffer

NXP Semiconductors. 

NXP Semiconductors

PCA9513A; PCA9514A

Hot swappable I2C-bus and SMBus bus buffer

The tPHL can never be negative because the output does not start to fall until the input is

below 0.7VCC, and the output turn on has a non-zero delay, and the output has a limited

maximum slew rate, and even if the input slew rate is slow enough that the output catches

up it will still lag the falling voltage of the input by the offset voltage. The maximum tPHL

occurs when the input is driven LOW with zero delay and the output is still limited by its

turn-on delay and the falling edge slew rate. The output falling edge slew rate is a function

of the internal maximum slew rate which is a function of temperature, VCC and process, as

well as the load current and the load capacitance.

8.5 Rise time accelerators

During positive bus transitions a 2 mA current source is switched on to quickly slew the

SDA and SCL lines HIGH once the input level of 0.8 V for the PCA9513A and PCA9514A

are exceeded. The rising edge rate should be at least 1.25 V/µs to guarantee turn on of

the accelerators. The built-in ∆V/∆t rise time accelerators on all SDA and SCL lines

requires the bus pull-up voltage and supply voltage (VCC) to be the same.

8.6 READY digital output

This pin provides a digital flag which is LOW when either ENABLE is LOW or the start-up

sequence described earlier in this section has not been completed. READY goes HIGH

when ENABLE is HIGH and start-up is complete. The pin is driven by an open-drain

pull-down capable of sinking 3 mA while holding 0.4 V on the pin. Connect a resistor of

10 kΩ to VCC to provide the pull-up.

8.7 ENABLE low current disable

Grounding the ENABLE pin disconnects the backplane side from the card side, disables

the rise time accelerators, drives READY LOW, disables the bus precharge circuitry, and

puts the part in a low current state. When the pin voltage is driven all the way to VCC, the

part waits for data transactions on both the backplane and card sides to be complete

before reconnecting the two sides.

8.8 Resistor pull-up value selection

The system pull-up resistors must be strong enough to provide a positive slew rate of

1.25 V/µs on the SDAn and SCLn pins, in order to activate the boost pull-up currents

during rising edges. Choose maximum resistor value using the formula given in

Equation 1:

RPU

≤

800

×

103





V-----C---C----(--m--C-i--n--)---–-----0---.-6--

(1)

where RPU is the pull-up resistor value in Ω, VCC(min) is the minimum VCC voltage in volts,

and C is the equivalent bus capacitance in picofarads.

In addition, regardless of the bus capacitance, always choose RPU ≤ 65.7 kΩ for

VCC = 5.5 V maximum, RPU ≤ 45 kΩ for VCC = 3.6 V maximum. The start-up circuitry

requires logic HIGH voltages on SDAOUT and SCLOUT to connect the backplane to the

card, and these pull-up values are needed to overcome the precharge voltage. See the

curves in Figure 6 and Figure 7 for guidance in resistor pull-up selection.

PCA9513A_PCA9514A_4

Product data sheet

Rev. 04 — 18 August 2009

© NXP B.V. 2009. All rights reserved.

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