PCA9512BD Просмотр технического описания (PDF) - NXP Semiconductors.

Номер в каталоге

Компоненты Описание

производитель

PCA9512BD

Level shifting hot swappable I2C-bus and SMBus bus buffer

NXP Semiconductors. 

NXP Semiconductors

PCA9512A; PCA9512B

Level shifting hot swappable I2C-bus and SMBus bus buffer

 Operating power supply voltage range: 2.7 V to 5.5 V

 0 Hz to 400 kHz clock frequency

 ESD protection exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM per

JESD22-C101

 Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA

 Packages offered: SO8, TSSOP8 (MSOP8)

3. Applications

 cPCI, VME, AdvancedTCA cards and other multipoint backplane cards that are

required to be inserted or removed from an operating system

4. Feature selection

Table 1. Feature selection chart

Feature

PCA9510A PCA9511A PCA9512A/B PCA9513A PCA9514A

Idle detect

yes

yes

yes

yes

yes

High-impedance SDAn, SCLn pins for VCC = 0 V

yes

yes

yes

Rise time accelerator circuitry on SDAn and SCLn pins -

yes

yes

yes

yes

yes

yes

Rise time accelerator circuitry hardware disable pin for -

-

yes

-

-

lightly loaded systems

Rise time accelerator threshold 0.8 V versus 0.6 V

-

-

-

improves noise margin

yes

yes

Ready open-drain output

yes

yes

-

yes

yes

Two VCC pins to support 5 V to 3.3 V level translation -

-

yes

-

-

with improved noise margins

1 V precharge on all SDAn and SCLn pins

in only

yes

yes

-

-

92 A current source on SCLIN and SDAIN for PICMG -

-

-

applications

yes

-

PCA9512A_PCA9512B

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 6 — 1 March 2013

© NXP B.V. 2013. All rights reserved.

2 of 27

Share Link: