PCA9511D Просмотр технического описания (PDF) - NXP Semiconductors.

Номер в каталоге

Компоненты Описание

производитель

PCA9511D

Hot swappable I2C-bus and SMBus bus buffer

NXP Semiconductors. 

Philips Semiconductors

Hot swappable I2C-bus and SMBus bus buffer

Product data sheet

PCA9511

DESCRIPTION

The PCA9511 is a are hot swappable I2C-bus and SMBus buffer

that allows I/O card insertion into a live backplane without corrupting

the data and clock buses. Control circuitry prevents the backplane

from being connected to the card until a STOP command or bus idle

occurs on the backplane without bus contention on the card. When

the connection is made, the PCA9511 provides bidirectional

buffering, keeping the backplane and card capacitances isolated.

The PCA9511 rise time accelerator circuitry allows the use of

weaker DC pull-up currents while still meeting rise time

requirements to prevent interference when there are multiple

devices in the same system. The PCA9511 incorporates a digital

ENABLE input pin, which enables the device when asserted HIGH

and forces the device into a low current mode when asserted LOW,

and an open-drain READY output pin, which indicates that the

backplane and card sides are connected together (HIGH) or not

(LOW).

During insertion, the PCA9511 SDA and SCL lines are precharged

to 1 V to minimize the current required to charge the parasitic

capacitance of the chip.

The dynamic offset design of the PCA9510/11/12/13/14 I/O drivers

allow them to be connected to another PCA9510/11/12/13/14 device

in series or in parallel and to the A side of the PCA9517. The

PCA9510/11/12/13/14 can not connect to the static offset I/Os used

on the PCA9515/15A/16/16A/17 B side and PCA9518.

APPLICATION

• cPCI, VME, AdvancedTCA cards and other multi-point backplane

cards that are required to be inserted or removed from an

operating system.

FEATURES

• Bidirectional buffer for SDA and SCL lines increases fanout and

prevents SDA and SCL corruption during live board insertion and

removal from multi-point backplane systems

• Compatible with I2C-bus Standard-mode, I2C-bus Fast-mode, and

SMBus standards

• ∆V/∆t rise time accelerators on all SDA and SCL lines

• Rise time accelerator threshold of 0.6 V

• Active HIGH ENABLE input

• Active HIGH READY open-drain output

• High-impedance SDA and SCL pins for VCC = 0 V

• 1 V precharge on all SDA and SCL lines

• Supports clock stretching and multiple master

arbitration/synchronization

• Operating power supply voltage range: 2.7 V to 5.5 V

• 0 Hz to 400 kHz clock frequency

• ESD protection exceeds 2000 V HBM per JESD22-A114,

200 V MM per JESD22-A115, and 1000 V CDM per

JESD22-C101

• Latch-up testing is done to JEDEC Standard JESD78 which

exceeds 100 mA

• Packages offered: SO8, TSSOP8 (MSOP8)

ORDERING INFORMATION

PACKAGES

TEMPERATURE RANGE

ORDER CODE

TOPSIDE MARK

8-pin plastic SO

–40 °C to +85 °C

PCA9511D

PCA9511

8-pin plastic TSSOP (MSOP)

–40 °C to +85 °C

PCA9511DP

9511

Standard packing quantities and other packaging data is available at www.standardproducts.philips.com/packaging.

DRAWING NUMBER

SOT96-1

SOT505-1

2006 Aug 23

2

Share Link: