PALCE20V8 Просмотр технического описания (PDF) - Advanced Micro Devices

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производитель

PALCE20V8

EE CMOS 24-Pin Universal Programmable Array Logic

Advanced Micro Devices 

AMD

CONNECTION DIAGRAMS

(Top View)

SKINNYDIP

CLK/I0 1

I1 2

I2 3

I3 4

I4 5

I5 6

I6 7

I7 8

I8 9

I9 10

I10 11

GND 12

24 VCC

23 I13

22 I/O7

21 I/O6

20 I/O5

19 I/O4

18 I/O3

17 I/O2

16 I/O1

15 I/O0

14 I12

13 OE/I11

16491D-2

Note:

Pin 1 is marked for orientation.

PIN DESIGNATIONS

CLK = Clock

GND = Ground

I

= Input

I/O = Input/Output

NC = No Connect

OE = Output Enable

VCC = Supply Voltage

PLCC/LCC

4 3 2 1 28 27 26

I3 5

I4 6

I5 7

NC 8

25 I/O6

24 I/O5

23 I/O4

22 NC

I6 9

21 I/O3

I7 10

20 I/O2

I8 11

19 I/O1

12 13 14 15 16 17 18

16491D-3

2-156

PALCE20V8 Family

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