89LPC925 Просмотр технического описания (PDF) - Philips Electronics

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89LPC925

8-bit microcontrollers with accelerated two-clock 80C51 core 4 kB/8 kB 3 V low-power Flash with 8-bit A/D converter

Philips Electronics 

Philips Semiconductors

P89LPC924/925

8-bit microcontrollers with accelerated two-clock 80C51 core

s A high performance 80C51 CPU provides instruction cycle times of 167 ns to

333 ns for all instructions except multiply and divide when executing at 12 MHz.

This is 6 times the performance of the standard 80C51 running at the same clock

frequency. A lower clock frequency for the same performance results in power

savings and reduced EMI.

s In-Application Programming of the Flash code memory. This allows changing the

code in a running application.

s Serial Flash programming allows simple in-circuit production coding. Flash

security bits prevent reading of sensitive application programs.

s Watchdog timer with separate on-chip oscillator, requiring no external

components. The watchdog prescaler is selectable from 8 values.

s Low voltage reset (Brownout detect) allows a graceful system shutdown when

power fails. May optionally be configured as an interrupt.

s Idle and two different Power-down reduced power modes. Improved wake-up from

Power-down mode (a low interrupt input starts execution). Typical Power-down

current is 1 µA (total Power-down with voltage comparators disabled).

s Active-LOW reset. On-chip power-on reset allows operation without external reset

components. A reset counter and reset glitch suppression circuitry prevent

spurious and incomplete resets. A software reset function is also available.

s Oscillator Fail Detect. The watchdog timer has a separate fully on-chip oscillator

allowing it to perform an oscillator fail detect function.

s Programmable port output configuration options:

x quasi-bidirectional,

x open drain,

x push-pull,

x input-only.

s Port ‘input pattern match’ detect. Port 0 may generate an interrupt when the value

of the pins match or do not match a programmable pattern.

s LED drive capability (20 mA) on all port pins. A maximum limit is specified for the

entire chip.

s Controlled slew rate port outputs to reduce EMI. Outputs have approximately

10 ns minimum ramp times.

s Only power and ground connections are required to operate the P89LPC924/925

when internal reset option is selected.

s Four interrupt priority levels.

s Eight keypad interrupt inputs, plus two additional external interrupt inputs.

s Second data pointer.

s Schmitt trigger port inputs.

s Emulation support.

9397 750 13459

Product data

Rev. 02 — 15 June 2004

© Koninklijke Philips Electronics N.V. 2004. All rights reserved.

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