KGL4210 Просмотр технического описания (PDF) - Oki Electric Industry
Номер в каталоге
Компоненты Описание
производитель
KGL4210 Datasheet PDF : 8 Pages
| |||
s KGL4208/KGL4209/KGL4210 s –––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––
BLOCK DIAGRAM
CK
50 Ω
CR
VDD
D
Q
CBFF
C
Q
VDD
D
Q
CBFF
C
Q
VDD
Q
Note: The number of KGL4208, 4209, and 4210 flip-flop stages are 2, 3, and 4, respectively.
CK
Clock Input Terminal
CR
Reference Voltage Bias Terminal
Q
Divided Frequency Output Terminal
VDD
Power Supply of Internal Circuit
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
Parameter
Supply Voltage
Clock Input Voltage
Temperature at Package Base Under Bias
Storage Temperature
Symbol
VDD
VCI
Ts
Tst
Min.
Max.
Units
-0.3
2.3
V
-0.3
1.5
V
-45
100
°C
-45
125
°C
Exceeding these maximum ratings could cause immediate damage or lead to permanent deterioration of the device.
Electrical Characteristics
VB = 2 V ± 0.1 V, VDD = 2 V ± 0.1 V, Ts = 0°C to 70°C
Parameter
Symbol
Min.
Typ.
Max.
Units
Operating Data Bit Rate Range
DAR
10
Gbps
Power Dissipation
PW
0.08
0.1
W
High-Level Clock Input Voltage
Low-Level Clock Input Voltage
High-Level Output Voltage
Low-Level Output Voltage
VIH
0.6
0.9
1.25
V
VIL
-0.1
0.1
0.3
V
VOH
0.5
0.7
0.9
V
VOL
0
0.1
0.2
V
2
Oki Semiconductor
Share Link: 